From: Daniel Vetter <daniel@ffwll.ch>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: daniel.vetter@intel.com, intel-gfx@lists.freedesktop.org,
ville.syrjala@intel.com
Subject: Re: [PATCH 01/15] drm/i915: Allocate min dbuf blocks per bspec
Date: Wed, 30 Sep 2015 14:20:20 +0200 [thread overview]
Message-ID: <20150930122020.GE3383@phenom.ffwll.local> (raw)
In-Reply-To: <20150929174505.GB26517@intel.com>
On Tue, Sep 29, 2015 at 08:45:05PM +0300, Ville Syrjälä wrote:
> On Fri, Sep 04, 2015 at 07:32:57PM -0700, Chandra Konduru wrote:
> > Properly allocate min blocks per hw requirements.
> >
> > v2:
> > - changed helper functional param to bool, some code simplification (Ville)
> >
> > Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
>
> IIRC I gave my r-b alrady?
Yup, it was a conditional r-b ("fix this tiny thing and you have the r-b")
somewhen in August.
Chandra in that case please add the r-b yourself to avoid wasting people's
time. Also, not doing that just increases the changes that someone will
spot something new ;-)
-Daniel
>
> But I'll toss it in again:
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 29 +++++++++++++++++++++++++++--
> > 1 file changed, 27 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index fff0c22..4d3aca0 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -2959,6 +2959,31 @@ skl_get_total_relative_data_rate(struct intel_crtc *intel_crtc,
> > return total_data_rate;
> > }
> >
> > +static uint16_t
> > +skl_dbuf_min_alloc(const struct intel_plane_wm_parameters *p, bool y_plane)
> > +{
> > + uint16_t min_alloc;
> > +
> > + /* For packed formats, no y-plane, return 0 */
> > + if (y_plane && !p->y_bytes_per_pixel)
> > + return 0;
> > +
> > + if (p->tiling == I915_FORMAT_MOD_Y_TILED ||
> > + p->tiling == I915_FORMAT_MOD_Yf_TILED) {
> > + uint32_t min_scanlines = 8;
> > + uint8_t bytes_per_pixel =
> > + y_plane ? p->y_bytes_per_pixel : p->bytes_per_pixel;
> > +
> > + min_scanlines = 32 / bytes_per_pixel;
> > + min_alloc = DIV_ROUND_UP((4 * p->horiz_pixels/(y_plane ? 1 : 2) *
> > + bytes_per_pixel), 512) * min_scanlines/4 + 3;
> > + } else {
> > + min_alloc = 8;
> > + }
> > +
> > + return min_alloc;
> > +}
> > +
> > static void
> > skl_allocate_pipe_ddb(struct drm_crtc *crtc,
> > const struct intel_wm_config *config,
> > @@ -2999,9 +3024,9 @@ skl_allocate_pipe_ddb(struct drm_crtc *crtc,
> > if (!p->enabled)
> > continue;
> >
> > - minimum[plane] = 8;
> > + minimum[plane] = skl_dbuf_min_alloc(p, false); /* uv-plane/packed */
> > alloc_size -= minimum[plane];
> > - y_minimum[plane] = p->y_bytes_per_pixel ? 8 : 0;
> > + y_minimum[plane] = skl_dbuf_min_alloc(p, true); /* y-plane */
> > alloc_size -= y_minimum[plane];
> > }
> >
> > --
> > 1.7.9.5
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Ville Syrjälä
> Intel OTC
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-09-30 12:17 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-05 2:32 [PATCH 00/15] drm/i915: Adding NV12 for skylake display Chandra Konduru
2015-09-05 2:32 ` [PATCH 01/15] drm/i915: Allocate min dbuf blocks per bspec Chandra Konduru
2015-09-29 17:45 ` Ville Syrjälä
2015-09-30 12:20 ` Daniel Vetter [this message]
2015-09-05 2:32 ` [PATCH 02/15] drm/i915: In DBUF/WM calcs for 90/270, swap w & h Chandra Konduru
2015-09-29 17:46 ` Ville Syrjälä
2015-09-05 2:32 ` [PATCH 03/15] drm/i915: Set scaler mode for NV12 Chandra Konduru
2015-09-29 17:47 ` Ville Syrjälä
2015-09-30 12:22 ` Daniel Vetter
2015-09-30 15:18 ` Daniel Vetter
2015-09-05 2:33 ` [PATCH 04/15] drm/i915: Stage scaler request for NV12 as src format Chandra Konduru
2015-09-10 17:36 ` Ville Syrjälä
2015-09-10 19:00 ` Konduru, Chandra
2015-09-11 16:43 ` Chandra Konduru
2015-09-05 2:33 ` [PATCH 05/15] drm/i915: Update format_is_yuv() to include NV12 Chandra Konduru
2015-09-29 17:47 ` Ville Syrjälä
2015-09-05 2:33 ` [PATCH 06/15] drm/i915: Upscale scaler max scale for NV12 Chandra Konduru
2015-09-29 17:48 ` Ville Syrjälä
2015-09-05 2:33 ` [PATCH 07/15] drm/i915: Add NV12 as supported format for primary plane Chandra Konduru
2015-09-10 17:40 ` Ville Syrjälä
2015-09-10 21:06 ` Konduru, Chandra
2015-09-10 21:28 ` Ville Syrjälä
2015-09-10 22:00 ` Konduru, Chandra
2015-09-14 8:43 ` Daniel Vetter
2015-09-16 1:34 ` Konduru, Chandra
2015-09-11 16:43 ` Chandra Konduru
2015-09-29 18:47 ` Ville Syrjälä
2015-09-05 2:33 ` [PATCH 08/15] drm/i915: Add NV12 as supported format for sprite plane Chandra Konduru
2015-09-29 17:50 ` Ville Syrjälä
2015-09-29 19:00 ` Ville Syrjälä
2015-09-05 2:33 ` [PATCH 09/15] drm/i915: Add NV12 support to intel_framebuffer_init Chandra Konduru
2015-09-09 22:59 ` Chandra Konduru
2015-09-10 18:34 ` Ville Syrjälä
2015-09-10 19:14 ` Konduru, Chandra
2015-09-10 19:43 ` Ville Syrjälä
2015-09-10 20:45 ` Konduru, Chandra
2015-09-14 8:45 ` Daniel Vetter
2015-09-16 1:35 ` Konduru, Chandra
2015-09-10 19:46 ` Ville Syrjälä
2015-09-10 20:59 ` Konduru, Chandra
[not found] ` <76A9B330A4D78C4D99CB292C4CC06C0E370D47CC@fmsmsx101.amr.corp.intel.com>
2015-09-21 16:14 ` Konduru, Chandra
2015-09-11 16:44 ` Chandra Konduru
2015-09-29 18:58 ` Ville Syrjälä
2015-09-30 22:58 ` Konduru, Chandra
2015-10-01 11:37 ` Ville Syrjälä
2015-10-01 11:41 ` Ville Syrjälä
2015-10-01 18:36 ` Konduru, Chandra
2015-09-05 2:33 ` [PATCH 10/15] drm/i915: Add NV12 to primary plane programming Chandra Konduru
2015-09-05 2:33 ` [PATCH 11/15] drm/i915: Add NV12 to sprite " Chandra Konduru
2015-09-05 2:33 ` [PATCH 12/15] drm/i915: Set initial phase & trip for NV12 scaler Chandra Konduru
2015-09-29 18:37 ` Ville Syrjälä
2015-09-05 2:33 ` [PATCH 13/15] drm/i915: skl nv12 wa - disable streamer fix Chandra Konduru
2015-09-05 2:33 ` [PATCH 14/15] drm/i915: skl nv12 wa - NV12 to RGB switch Chandra Konduru
2015-09-09 23:00 ` Chandra Konduru
2015-09-05 2:33 ` [PATCH 15/15] drm/i915: Add 90/270 rotation for NV12 format Chandra Konduru
-- strict thread matches above, loose matches on Subject: below --
2015-08-20 1:02 [PATCH 00/15] drm/i915: Adding NV12 for skylake display Chandra Konduru
2015-08-20 1:02 ` [PATCH 01/15] drm/i915: Allocate min dbuf blocks per bspec Chandra Konduru
2015-09-04 8:17 ` Ville Syrjälä
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