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From: Ben Widawsky <benjamin.widawsky@intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 3/5] drm/i915: rename INSTDONE1 to GEN4_INSTDONE1
Date: Thu, 1 Oct 2015 15:58:08 -0700	[thread overview]
Message-ID: <20151001225803.GA24105@intel.com> (raw)
In-Reply-To: <1443643246-7832-4-git-send-email-imre.deak@intel.com>

On Wed, Sep 30, 2015 at 11:00:44PM +0300, Imre Deak wrote:
> This register was added on GEN4, by the name INSTDONE_1 whereas the GEN6
> specification calls it INSTDONE_2. Keep the original name with a
> platform prefix to make it clearer which INSTDONE register instance this
> is. Also add a comment about the SNB alternative name.
> 
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gpu_error.c | 2 +-
>  drivers/gpu/drm/i915/i915_reg.h       | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
> index 85d9a39..2f04e4f 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -1391,7 +1391,7 @@ void i915_get_extra_instdone(struct drm_device *dev, uint32_t *instdone)
>  		instdone[0] = I915_READ(GEN2_INSTDONE);
>  	else if (IS_GEN4(dev) || IS_GEN5(dev) || IS_GEN6(dev)) {
>  		instdone[0] = I915_READ(RING_INSTDONE(RENDER_RING_BASE));
> -		instdone[1] = I915_READ(INSTDONE1);
> +		instdone[1] = I915_READ(GEN4_INSTDONE1);
>  	} else if (INTEL_INFO(dev)->gen >= 7) {
>  		instdone[0] = I915_READ(RING_INSTDONE(RENDER_RING_BASE));
>  		instdone[1] = I915_READ(GEN7_SC_INSTDONE);
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 6e3d816..c12f3b8 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1611,7 +1611,7 @@ enum skl_disp_power_wells {
>  #define RING_INSTPM(base)	((base)+0xc0)
>  #define RING_MI_MODE(base)	((base)+0x9c)
>  #define INSTPS		0x02070 /* 965+ only */
> -#define INSTDONE1	0x0207c /* 965+ only */
> +#define GEN4_INSTDONE1	0x0207c /* 965+ only, aka INSTDONE_2 on SNB */
>  #define ACTHD_I965	0x02074
>  #define HWS_PGA		0x02080
>  #define HWS_ADDRESS_MASK	0xfffff000

1-3 are:
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

I'll look over 4, and 5, but since I originally authored them, I probably won't
make a good reviewer.

-- 
Ben Widawsky, Intel Open Source Technology Center
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  reply	other threads:[~2015-10-01 22:58 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-30 20:00 [PATCH 0/5] drm/i915: per slice/subslice INSTDONE capturing Imre Deak
2015-09-30 20:00 ` [PATCH 1/5] drm/i915: remove duplicate names for the render ring INSTDONE register Imre Deak
2015-09-30 20:00 ` [PATCH 2/5] drm/i915: rename INSTDONE to GEN2_INSTDONE Imre Deak
2015-09-30 20:00 ` [PATCH 3/5] drm/i915: rename INSTDONE1 to GEN4_INSTDONE1 Imre Deak
2015-10-01 22:58   ` Ben Widawsky [this message]
2015-09-30 20:00 ` [PATCH 4/5] drm/i915: Cleanup instdone collection Imre Deak
2015-09-30 20:00 ` [PATCH 5/5] drm/i915: Try to print INSTDONE bits for all slice/subslice Imre Deak
2015-10-01 23:00   ` Ben Widawsky
2015-10-02 10:58     ` Imre Deak
2015-10-02 15:52       ` Ben Widawsky
2015-10-01 23:56   ` Ben Widawsky
2015-10-02  9:44     ` Imre Deak
2015-10-02 13:03       ` Daniel Vetter

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