Re: [PATCH v3] drm/i915/guc: Add host2guc notification for suspend and resume

[Daniel Vetter <daniel@ffwll.ch>]

On Fri, Oct 02, 2015 at 09:49:13PM +0530, Kamble, Sagar A wrote:
> Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
> 
> On 9/30/2015 10:16 PM, yu.dai@intel.com wrote:
> >From: Alex Dai <yu.dai@intel.com>
> >
> >Add host2guc interface to notify GuC power state changes when
> >enter or resume from power saving state.
> >
> >v3: Move intel_guc_suspend to i915_drm_suspend for consistency.
> >
> >v2: Add GuC suspend/resume to runtime suspend/resume too
> >
> >v1: Change to a more flexible way when fill host to GuC scratch
> >data in order to remove hard coding.
> >
> >Signed-off-by: Alex Dai <yu.dai@intel.com>

Queued for -next, thanks for the patch.
-Daniel

> >---
> >  drivers/gpu/drm/i915/i915_drv.c            |  8 +++++
> >  drivers/gpu/drm/i915/i915_guc_submission.c | 50 ++++++++++++++++++++++++++++++
> >  drivers/gpu/drm/i915/intel_guc.h           |  2 ++
> >  drivers/gpu/drm/i915/intel_guc_fwif.h      |  8 +++++
> >  drivers/gpu/drm/i915/intel_guc_loader.c    |  4 ++-
> >  5 files changed, 71 insertions(+), 1 deletion(-)
> >
> >diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> >index 1cb6b82..760e0ce 100644
> >--- a/drivers/gpu/drm/i915/i915_drv.c
> >+++ b/drivers/gpu/drm/i915/i915_drv.c
> >@@ -638,6 +638,8 @@ static int i915_drm_suspend(struct drm_device *dev)
> >  		return error;
> >  	}
> >+	intel_guc_suspend(dev);
> >+
> >  	intel_suspend_gt_powersave(dev);
> >  	/*
> >@@ -767,6 +769,8 @@ static int i915_drm_resume(struct drm_device *dev)
> >  	}
> >  	mutex_unlock(&dev->struct_mutex);
> >+	intel_guc_resume(dev);
> >+
> >  	intel_modeset_init_hw(dev);
> >  	spin_lock_irq(&dev_priv->irq_lock);
> >@@ -1500,6 +1504,8 @@ static int intel_runtime_suspend(struct device *device)
> >  	i915_gem_release_all_mmaps(dev_priv);
> >  	mutex_unlock(&dev->struct_mutex);
> >+	intel_guc_suspend(dev);
> >+
> >  	intel_suspend_gt_powersave(dev);
> >  	intel_runtime_pm_disable_interrupts(dev_priv);
> >@@ -1559,6 +1565,8 @@ static int intel_runtime_resume(struct device *device)
> >  	intel_opregion_notify_adapter(dev, PCI_D0);
> >  	dev_priv->pm.suspended = false;
> >+	intel_guc_resume(dev);
> >+
> >  	if (IS_GEN6(dev_priv))
> >  		intel_init_pch_refclk(dev);
> >diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
> >index 0b1797f..036b42b 100644
> >--- a/drivers/gpu/drm/i915/i915_guc_submission.c
> >+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
> >@@ -923,3 +923,53 @@ void i915_guc_submission_fini(struct drm_device *dev)
> >  	gem_release_guc_obj(guc->ctx_pool_obj);
> >  	guc->ctx_pool_obj = NULL;
> >  }
> >+
> >+/**
> >+ * intel_guc_suspend() - notify GuC entering suspend state
> >+ * @dev:	drm device
> >+ */
> >+int intel_guc_suspend(struct drm_device *dev)
> >+{
> >+	struct drm_i915_private *dev_priv = dev->dev_private;
> >+	struct intel_guc *guc = &dev_priv->guc;
> >+	struct intel_context *ctx;
> >+	u32 data[3];
> >+
> >+	if (!i915.enable_guc_submission)
> >+		return 0;
> >+
> >+	ctx = dev_priv->ring[RCS].default_context;
> >+
> >+	data[0] = HOST2GUC_ACTION_ENTER_S_STATE;
> >+	/* any value greater than GUC_POWER_D0 */
> >+	data[1] = GUC_POWER_D1;
> >+	/* first page is shared data with GuC */
> >+	data[2] = i915_gem_obj_ggtt_offset(ctx->engine[RCS].state);
> >+
> >+	return host2guc_action(guc, data, ARRAY_SIZE(data));
> >+}
> >+
> >+
> >+/**
> >+ * intel_guc_resume() - notify GuC resuming from suspend state
> >+ * @dev:	drm device
> >+ */
> >+int intel_guc_resume(struct drm_device *dev)
> >+{
> >+	struct drm_i915_private *dev_priv = dev->dev_private;
> >+	struct intel_guc *guc = &dev_priv->guc;
> >+	struct intel_context *ctx;
> >+	u32 data[3];
> >+
> >+	if (!i915.enable_guc_submission)
> >+		return 0;
> >+
> >+	ctx = dev_priv->ring[RCS].default_context;
> >+
> >+	data[0] = HOST2GUC_ACTION_EXIT_S_STATE;
> >+	data[1] = GUC_POWER_D0;
> >+	/* first page is shared data with GuC */
> >+	data[2] = i915_gem_obj_ggtt_offset(ctx->engine[RCS].state);
> >+
> >+	return host2guc_action(guc, data, ARRAY_SIZE(data));
> >+}
> >diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
> >index 63e73f3..5ba5866 100644
> >--- a/drivers/gpu/drm/i915/intel_guc.h
> >+++ b/drivers/gpu/drm/i915/intel_guc.h
> >@@ -116,6 +116,8 @@ extern void intel_guc_ucode_init(struct drm_device *dev);
> >  extern int intel_guc_ucode_load(struct drm_device *dev);
> >  extern void intel_guc_ucode_fini(struct drm_device *dev);
> >  extern const char *intel_guc_fw_status_repr(enum intel_guc_fw_status status);
> >+extern int intel_guc_suspend(struct drm_device *dev);
> >+extern int intel_guc_resume(struct drm_device *dev);
> >  /* i915_guc_submission.c */
> >  int i915_guc_submission_init(struct drm_device *dev);
> >diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h b/drivers/gpu/drm/i915/intel_guc_fwif.h
> >index f0a9e82..d25c5b7 100644
> >--- a/drivers/gpu/drm/i915/intel_guc_fwif.h
> >+++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
> >@@ -293,12 +293,20 @@ struct guc_context_desc {
> >  #define GUC_FORCEWAKE_RENDER	(1 << 0)
> >  #define GUC_FORCEWAKE_MEDIA	(1 << 1)
> >+#define GUC_POWER_UNSPECIFIED	0
> >+#define GUC_POWER_D0		1
> >+#define GUC_POWER_D1		2
> >+#define GUC_POWER_D2		3
> >+#define GUC_POWER_D3		4
> >+
> >  /* This Action will be programmed in C180 - SOFT_SCRATCH_O_REG */
> >  enum host2guc_action {
> >  	HOST2GUC_ACTION_DEFAULT = 0x0,
> >  	HOST2GUC_ACTION_SAMPLE_FORCEWAKE = 0x6,
> >  	HOST2GUC_ACTION_ALLOCATE_DOORBELL = 0x10,
> >  	HOST2GUC_ACTION_DEALLOCATE_DOORBELL = 0x20,
> >+	HOST2GUC_ACTION_ENTER_S_STATE = 0x501,
> >+	HOST2GUC_ACTION_EXIT_S_STATE = 0x502,
> >  	HOST2GUC_ACTION_SLPC_REQUEST = 0x3003,
> >  	HOST2GUC_ACTION_LIMIT
> >  };
> >diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
> >index 3a7f08e..ae85366 100644
> >--- a/drivers/gpu/drm/i915/intel_guc_loader.c
> >+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> >@@ -379,7 +379,6 @@ int intel_guc_ucode_load(struct drm_device *dev)
> >  		intel_guc_fw_status_repr(guc_fw->guc_fw_load_status));
> >  	direct_interrupts_to_host(dev_priv);
> >-	i915_guc_submission_disable(dev);
> >  	if (guc_fw->guc_fw_fetch_status == GUC_FIRMWARE_NONE)
> >  		return 0;
> >@@ -429,6 +428,9 @@ int intel_guc_ucode_load(struct drm_device *dev)
> >  		intel_guc_fw_status_repr(guc_fw->guc_fw_load_status));
> >  	if (i915.enable_guc_submission) {
> >+		/* The execbuf_client will be recreated. Release it first. */
> >+		i915_guc_submission_disable(dev);
> >+
> >  		err = i915_guc_submission_enable(dev);
> >  		if (err)
> >  			goto fail;
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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