From: Daniel Vetter <daniel@ffwll.ch>
To: Jordan Justen <jordan.l.justen@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Add GEN7_GPGPU_DISPATCHDIMX/Y/Z to the register whitelist
Date: Tue, 6 Oct 2015 10:40:13 +0200 [thread overview]
Message-ID: <20151006084013.GV3383@phenom.ffwll.local> (raw)
In-Reply-To: <20151002153345.510.30543@jljusten-ivb>
On Fri, Oct 02, 2015 at 08:33:45AM -0700, Jordan Justen wrote:
> On 2015-10-02 01:06:01, Daniel Vetter wrote:
> > On Thu, Oct 01, 2015 at 11:09:58PM -0700, Jordan Justen wrote:
> > > This is required to support glDispatchComputeIndirect for gen7.
> > >
> > > Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
> > > Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
> >
> > Do you have a link to the mesa patches? As soon as those are r-b'ed I'll
> > pull this in.
>
> The patch that uses these registers in mesa is already upstream.
>
> http://cgit.freedesktop.org/mesa/mesa/commit/?id=ebbe6cdad7ab082d2b191fe6c7c0eaa6921d55de
This tends to royally piss of Dave, and last time around mesa was merged
before the kernel Dave just reverted everything and broke the mesa build.
Please never commit mesa patches before the kernel side has landed, ever.
I've pulled this one in here meanwhile to cover this up.
Thanks, Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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prev parent reply other threads:[~2015-10-06 8:37 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-02 6:09 [PATCH] drm/i915: Add GEN7_GPGPU_DISPATCHDIMX/Y/Z to the register whitelist Jordan Justen
2015-10-02 8:06 ` Daniel Vetter
2015-10-02 15:33 ` Jordan Justen
2015-10-06 8:40 ` Daniel Vetter [this message]
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