From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 7/7] drm/i915: Add csr programming registers to dmc debugfs entry Date: Wed, 21 Oct 2015 18:53:17 +0300 Message-ID: <20151021155317.GL26517@intel.com> References: <1445442112-22027-1-git-send-email-mika.kuoppala@intel.com> <1445442112-22027-7-git-send-email-mika.kuoppala@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 09D336E073 for ; Wed, 21 Oct 2015 08:53:22 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1445442112-22027-7-git-send-email-mika.kuoppala@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Mika Kuoppala Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org T24gV2VkLCBPY3QgMjEsIDIwMTUgYXQgMDY6NDE6NTJQTSArMDMwMCwgTWlrYSBLdW9wcGFsYSB3 cm90ZToKPiBXZSBjaGVjayB0aGVzZSB0byBkZXRlcm1pbmUgZmlybXdhcmUgbG9hZGluZyBzdGF0 dXMuIEluY2x1ZGUKPiB0aGVtIHRvIGhlbHAgdG8gZGVidWcgY2F1c2VzIG9mIGZpcm13YXJlIGxv YWRpbmcgZmFpbHMuCj4gCj4gU2lnbmVkLW9mZi1ieTogTWlrYSBLdW9wcGFsYSA8bWlrYS5rdW9w cGFsYUBpbnRlbC5jb20+Cj4gLS0tCj4gIGRyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfZGVidWdm cy5jIHwgNCArKysrCj4gIGRyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfcmVnLmggICAgIHwgMyAr KysKPiAgMiBmaWxlcyBjaGFuZ2VkLCA3IGluc2VydGlvbnMoKykKPiAKPiBkaWZmIC0tZ2l0IGEv ZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9kZWJ1Z2ZzLmMgYi9kcml2ZXJzL2dwdS9kcm0vaTkx NS9pOTE1X2RlYnVnZnMuYwo+IGluZGV4IDVkNjA2ZjAuLmU1NGYxYmYgMTAwNjQ0Cj4gLS0tIGEv ZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9kZWJ1Z2ZzLmMKPiArKysgYi9kcml2ZXJzL2dwdS9k cm0vaTkxNS9pOTE1X2RlYnVnZnMuYwo+IEBAIC0yNzk1LDYgKzI3OTUsMTAgQEAgc3RhdGljIGlu dCBpOTE1X2RtY19pbmZvKHN0cnVjdCBzZXFfZmlsZSAqbSwgdm9pZCAqdW51c2VkKQo+ICAKPiAg CWNzcl9zdGF0ZSA9IGludGVsX2Nzcl9sb2FkX3N0YXR1c19nZXQoZGV2X3ByaXYpOwo+ICAJc2Vx X3ByaW50ZihtLCAic3RhdHVzOiAlc1xuIiwgY3NyX3N0YXRlX3N0cltjc3Jfc3RhdGVdKTsKPiAr CXNlcV9wcmludGYobSwgInBhdGg6ICVzXG4iLCBjc3ItPmZ3X3BhdGgpOwo+ICsJc2VxX3ByaW50 ZihtLCAicHJvZ3JhbSBiYXNlOiAweCUwOHhcbiIsIEk5MTVfUkVBRChDU1JfUFJPR1JBTSgwKSkp Owo+ICsJc2VxX3ByaW50ZihtLCAic3NwIGJhc2U6IDB4JTA4eFxuIiwgSTkxNV9SRUFEKENTUl9T U1BfQkFTRSkpOwo+ICsJc2VxX3ByaW50ZihtLCAiaHRwOiAweCUwOHhcbiIsIEk5MTVfUkVBRChD U1JfSFRQX1NLTCkpOwo+ICAKPiAgCWlmIChjc3Jfc3RhdGUgIT0gRldfTE9BREVEKQo+ICAJCXJl dHVybiAwOwo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X3JlZy5oIGIv ZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9yZWcuaAo+IGluZGV4IDA1ZjRhMTguLjk5NjZiZmQg MTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9yZWcuaAo+ICsrKyBiL2Ry aXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfcmVnLmgKPiBAQCAtNTY5Nyw2ICs1Njk3LDkgQEAgZW51 bSBza2xfZGlzcF9wb3dlcl93ZWxscyB7Cj4gICNkZWZpbmUgR0FNTUFfTU9ERV9NT0RFX1NQTElU CSgzIDw8IDApCj4gIAo+ICAvKiBETUMvQ1NSICovCj4gKyNkZWZpbmUgQ1NSX1BST0dSQU0oaSkJ CSgweDgwMDAwICsgKGkpICogNCkKPiArI2RlZmluZSBDU1JfU1NQX0JBU0UJCTB4OEYwNzQKPiAr I2RlZmluZSBDU1JfSFRQX1NLTAkJMHg4RjAwNAoKQ2FuIHlvdSBqdXN0IG1vdmUgYWxsIG9mIGl0 IGZyb20gaW50ZWxfY3NyLmMgdG8gaGVyZT8KCj4gICNkZWZpbmUgU0tMX0NTUl9EQzNfREM1X0NP VU5UCTB4ODAwMzAKPiAgI2RlZmluZSBTS0xfQ1NSX0RDNV9EQzZfQ09VTlQJMHg4MDAyQwo+ICAj ZGVmaW5lIEJYVF9DU1JfREMzX0RDNV9DT1VOVAkweDgwMDM4Cj4gLS0gCj4gMi4xLjQKPiAKPiBf X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwo+IEludGVsLWdm eCBtYWlsaW5nIGxpc3QKPiBJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCj4gaHR0cDov L2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeAoKLS0gClZp bGxlIFN5cmrDpGzDpApJbnRlbCBPVEMKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX18KSW50ZWwtZ2Z4IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJl ZWRlc2t0b3Aub3JnCmh0dHA6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5m by9pbnRlbC1nZngK