From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/2] drm/i915/execlists: HWS is uncached on !llc platforms
Date: Fri, 23 Oct 2015 21:22:38 +0300 [thread overview]
Message-ID: <20151023182238.GC26517@intel.com> (raw)
In-Reply-To: <20151023175641.GA21481@nuc-i3427.alporthouse.com>
On Fri, Oct 23, 2015 at 06:56:41PM +0100, Chris Wilson wrote:
> On Fri, Oct 23, 2015 at 08:50:42PM +0300, Ville Syrjälä wrote:
> > On Fri, Oct 23, 2015 at 06:43:31PM +0100, Chris Wilson wrote:
> > > As the HWS is mapped into the GPU as uncached,
> >
> > Since when?
>
> Since it is embedded into execlists' default context which is allocated
> using the system default cache level, i.e. uncached on !llc. See
> intel_lr_context_deferred_alloc()
Oh right. That doesn't actually matter since it's mapped through ggtt
which means it always goes through PAT 0.
--
Ville Syrjälä
Intel OTC
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next prev parent reply other threads:[~2015-10-23 18:23 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-23 17:43 [PATCH 1/2] drm/i915/execlists: HWS is uncached on !llc platforms Chris Wilson
2015-10-23 17:43 ` [PATCH 2/2] drm/i915: Serialise updates to GGTT with access through GGTT on Braswell Chris Wilson
2015-10-23 19:45 ` Chris Wilson
2015-10-30 16:14 ` Daniel Vetter
2015-10-30 16:58 ` Chris Wilson
2015-11-17 16:37 ` Daniel Vetter
2015-11-18 23:08 ` Jesse Barnes
2015-11-19 9:14 ` Daniel Vetter
2015-11-19 9:35 ` Chris Wilson
2015-11-19 16:35 ` Jesse Barnes
2015-10-23 17:50 ` [PATCH 1/2] drm/i915/execlists: HWS is uncached on !llc platforms Ville Syrjälä
2015-10-23 17:56 ` Chris Wilson
2015-10-23 18:22 ` Ville Syrjälä [this message]
2015-10-23 18:29 ` Chris Wilson
2015-10-23 18:41 ` Ville Syrjälä
2015-10-23 19:08 ` Chris Wilson
2015-10-23 19:36 ` Ville Syrjälä
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