From: Zhiyuan Lv <zhiyuan.lv@intel.com>
To: ville.syrjala@linux.intel.com
Cc: intel-gfx@lists.freedesktop.org, Eddie Dong <eddie.dong@intel.com>
Subject: Re: [PATCH 24/29] drm/i915: Turn vgpu pdps into an array
Date: Thu, 5 Nov 2015 14:56:09 +0800 [thread overview]
Message-ID: <20151105065609.GD11540@zlv-hp-dev> (raw)
In-Reply-To: <1446672017-24497-25-git-send-email-ville.syrjala@linux.intel.com>
On Wed, Nov 04, 2015 at 11:20:12PM +0200, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We'll want to avoid performing arithmetic with register offsets, so
> instead calculating the vgpu PDP as pdp0_lo+offset, make the PDPs
> into an array. This way we can simply loop through them.
>
> Cc: Eddie Dong <eddie.dong@intel.com>
> Cc: Jike Song <jike.song@intel.com>
> Cc: Kevin Tian <kevin.tian@intel.com>
> Cc: Yu Zhang <yu.c.zhang@linux.intel.com>
> Cc: Zhi Wang <zhi.a.wang@intel.com>
> Cc: Zhiyuan Lv <zhiyuan.lv@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
It looks good to me. Thanks for the change!
Reviewed-by: Zhiyuan Lv <zhiyuan.lv@intel.com>
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 11 ++++-------
> drivers/gpu/drm/i915/i915_vgpu.h | 12 ++++--------
> 2 files changed, 8 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 8dfcfd5..57cc7fd 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -909,14 +909,13 @@ static int gen8_ppgtt_notify_vgt(struct i915_hw_ppgtt *ppgtt, bool create)
> enum vgt_g2v_type msg;
> struct drm_device *dev = ppgtt->base.dev;
> struct drm_i915_private *dev_priv = dev->dev_private;
> - unsigned int offset = vgtif_reg(pdp0_lo);
> int i;
>
> if (USES_FULL_48BIT_PPGTT(dev)) {
> u64 daddr = px_dma(&ppgtt->pml4);
>
> - I915_WRITE(offset, lower_32_bits(daddr));
> - I915_WRITE(offset + 4, upper_32_bits(daddr));
> + I915_WRITE(vgtif_reg(pdp[0].lo), lower_32_bits(daddr));
> + I915_WRITE(vgtif_reg(pdp[0].hi), upper_32_bits(daddr));
>
> msg = (create ? VGT_G2V_PPGTT_L4_PAGE_TABLE_CREATE :
> VGT_G2V_PPGTT_L4_PAGE_TABLE_DESTROY);
> @@ -924,10 +923,8 @@ static int gen8_ppgtt_notify_vgt(struct i915_hw_ppgtt *ppgtt, bool create)
> for (i = 0; i < GEN8_LEGACY_PDPES; i++) {
> u64 daddr = i915_page_dir_dma_addr(ppgtt, i);
>
> - I915_WRITE(offset, lower_32_bits(daddr));
> - I915_WRITE(offset + 4, upper_32_bits(daddr));
> -
> - offset += 8;
> + I915_WRITE(vgtif_reg(pdp[i].lo), lower_32_bits(daddr));
> + I915_WRITE(vgtif_reg(pdp[i].hi), upper_32_bits(daddr));
> }
>
> msg = (create ? VGT_G2V_PPGTT_L3_PAGE_TABLE_CREATE :
> diff --git a/drivers/gpu/drm/i915/i915_vgpu.h b/drivers/gpu/drm/i915/i915_vgpu.h
> index 21c97f4..2c97d5a 100644
> --- a/drivers/gpu/drm/i915/i915_vgpu.h
> +++ b/drivers/gpu/drm/i915/i915_vgpu.h
> @@ -92,14 +92,10 @@ struct vgt_if {
> uint32_t g2v_notify;
> uint32_t rsv6[7];
>
> - uint32_t pdp0_lo;
> - uint32_t pdp0_hi;
> - uint32_t pdp1_lo;
> - uint32_t pdp1_hi;
> - uint32_t pdp2_lo;
> - uint32_t pdp2_hi;
> - uint32_t pdp3_lo;
> - uint32_t pdp3_hi;
> + struct {
> + uint32_t lo;
> + uint32_t hi;
> + } pdp[4];
>
> uint32_t execlist_context_descriptor_lo;
> uint32_t execlist_context_descriptor_hi;
> --
> 2.4.10
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-11-05 7:04 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-04 21:19 [PATCH v2 00/29] drm/i915: Type safe register read/write (v2) and more prep work ville.syrjala
2015-11-04 21:19 ` [PATCH 01/29] pci: Decouple quirks.c from i915_reg.h ville.syrjala
2015-11-05 13:37 ` Chris Wilson
2015-11-24 17:09 ` Bjorn Helgaas
2015-11-04 21:19 ` [PATCH 02/29] drm/i915: Remove the magic AUX_CTL is at DP + foo tricks ville.syrjala
2015-11-06 13:21 ` Chris Wilson
2015-11-04 21:19 ` [PATCH 03/29] drm/i915: Replace the aux ddc name switch statement with a table ville.syrjala
2015-11-05 14:10 ` Chris Wilson
2015-11-05 14:22 ` Ville Syrjälä
2015-11-05 14:33 ` Chris Wilson
2015-11-04 21:19 ` [PATCH v3 04/29] drm/i915: Parametrize AUX registers ville.syrjala
2015-11-06 13:25 ` Chris Wilson
2015-11-06 13:41 ` Ville Syrjälä
2015-11-04 21:19 ` [PATCH v2 05/29] drm/i915: Add dev_priv->psr_mmio_base ville.syrjala
2015-11-05 14:40 ` Chris Wilson
2015-11-05 14:51 ` Ville Syrjälä
2015-11-04 21:19 ` [PATCH v3 06/29] drm/i915: Store aux data reg offsets in intel_dp->aux_ch_data_reg[] ville.syrjala
2015-11-06 13:23 ` Chris Wilson
2015-11-04 21:19 ` [PATCH v2 07/29] drm/i915: Model PSR AUX register selection more like the normal AUX code ville.syrjala
2015-11-05 21:34 ` Chris Wilson
2015-11-04 21:19 ` [PATCH 08/29] drm/i915: s/PCH_DP_/PORT_/ in intel_trans_dp_port_sel() and move it next to its only user ville.syrjala
2015-11-05 13:54 ` Chris Wilson
2015-11-04 21:19 ` [PATCH 09/29] drm/i915: Replace aux_ch_ctl_reg check with port check ville.syrjala
2015-11-05 13:55 ` Chris Wilson
2015-11-04 21:19 ` [PATCH 10/29] drm/i915: s/is_sdvob/enum port/ ville.syrjala
2015-11-05 14:05 ` Chris Wilson
2015-11-06 19:29 ` [PATCH v2 " ville.syrjala
2015-11-04 21:19 ` [PATCH 11/29] drm/i915: Store DVO SRCDIM register offset under intel_dvo_device ville.syrjala
2015-11-05 11:10 ` Chris Wilson
2015-11-04 21:20 ` [PATCH 12/29] drm/i915: Streamline gpio_mmio_base deduction ville.syrjala
2015-11-18 9:46 ` Daniel Vetter
2015-11-04 21:20 ` [PATCH 13/29] drm/i915: Prefix raw register defines with underscore ville.syrjala
2015-11-05 13:50 ` Chris Wilson
2015-11-04 21:20 ` [PATCH 14/29] drm/i915: Parametrize L3 error registers ville.syrjala
2015-11-05 11:22 ` Chris Wilson
2015-11-04 21:20 ` [PATCH 15/29] drm/i915: Parametrize MOCS registers ville.syrjala
2015-11-05 11:15 ` Chris Wilson
2015-11-05 12:13 ` [PATCH v2 " ville.syrjala
2015-11-05 13:24 ` Chris Wilson
2015-11-04 21:20 ` [PATCH 16/29] drm/i915: s/0x50/RING_PSMI_CTL/ ville.syrjala
2015-11-05 11:16 ` Chris Wilson
2015-11-04 21:20 ` [PATCH 17/29] drm/i915: Make the high dword offset more explicit in i915_reg_read_ioctl ville.syrjala
2015-11-05 10:59 ` Chris Wilson
2015-11-05 11:41 ` Ville Syrjälä
2015-11-05 13:33 ` Chris Wilson
2015-11-06 19:43 ` [PATCH v2 " ville.syrjala
2015-11-18 12:30 ` Chris Wilson
2015-11-04 21:20 ` [PATCH 18/29] drm/i915: Make the cmd parser 64bit regs explicit ville.syrjala
2015-11-05 11:02 ` Chris Wilson
2015-11-06 19:44 ` [PATCH v2 " ville.syrjala
2015-11-04 21:20 ` [PATCH v2 19/29] drm/i915: Add functions to emit register offsets to the ring ville.syrjala
2015-11-05 11:03 ` Chris Wilson
2015-11-05 11:44 ` Ville Syrjälä
2015-11-05 12:01 ` Chris Wilson
2015-11-05 12:05 ` Ville Syrjälä
2015-11-04 21:20 ` [PATCH 20/29] drm/i915: Add wa_ctx_emit_reg() ville.syrjala
2015-11-05 11:04 ` Chris Wilson
2015-11-04 21:20 ` [PATCH 21/29] drm/i915: Wrap ASSIGN_CTX_{PDP, PM4L} in do {} while(0) ville.syrjala
2015-11-05 13:38 ` Chris Wilson
2015-11-04 21:20 ` [PATCH 22/29] drm/i915: Give names to more ring registers ville.syrjala
2015-11-05 13:46 ` Chris Wilson
2015-11-04 21:20 ` [PATCH 23/29] drm/i915: Wrap context LRI init in a macro ville.syrjala
2015-11-05 13:49 ` Chris Wilson
2015-11-04 21:20 ` [PATCH 24/29] drm/i915: Turn vgpu pdps into an array ville.syrjala
2015-11-05 6:56 ` Zhiyuan Lv [this message]
2015-11-04 21:20 ` [PATCH 25/29] drm/i915: Pull the vgpu uncore funcs apart from the rest of gen6+ ville.syrjala
2015-11-05 7:33 ` Zhiyuan Lv
2015-11-04 21:20 ` [PATCH 26/29] drm/i915: Add 'offset' to uncore funcs ville.syrjala
2015-11-05 10:16 ` Chris Wilson
2015-11-05 11:38 ` Ville Syrjälä
2015-11-06 19:47 ` [PATCH v2 " ville.syrjala
2015-11-06 20:33 ` Chris Wilson
2015-11-04 21:20 ` [PATCH 27/29] drm/i915: Add save/restore of SWF for ILK+ ville.syrjala
2015-11-06 13:14 ` Chris Wilson
2015-11-06 13:38 ` Ville Syrjälä
2015-11-04 21:20 ` [PATCH 28/29] drm/i915: Add missing ')' to SKL_PS_ECC_STAT define ville.syrjala
2015-11-05 14:33 ` Chris Wilson
2015-11-04 21:20 ` [PATCH v3 29/29] drm/i915: Type safe register read/write ville.syrjala
2015-11-05 9:55 ` Chris Wilson
2015-11-18 13:33 ` [PATCH v4 " ville.syrjala
2015-11-18 13:45 ` [PATCH v2 00/29] drm/i915: Type safe register read/write (v2) and more prep work Ville Syrjälä
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20151105065609.GD11540@zlv-hp-dev \
--to=zhiyuan.lv@intel.com \
--cc=eddie.dong@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=ville.syrjala@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox