From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH v2 19/29] drm/i915: Add functions to emit register offsets to the ring Date: Thu, 5 Nov 2015 13:44:08 +0200 Message-ID: <20151105114408.GG4437@intel.com> References: <1446672017-24497-1-git-send-email-ville.syrjala@linux.intel.com> <1446672017-24497-20-git-send-email-ville.syrjala@linux.intel.com> <20151105110338.GS669@nuc-i3427.alporthouse.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 02A0672193 for ; Thu, 5 Nov 2015 03:44:11 -0800 (PST) Content-Disposition: inline In-Reply-To: <20151105110338.GS669@nuc-i3427.alporthouse.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Chris Wilson , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org T24gVGh1LCBOb3YgMDUsIDIwMTUgYXQgMTE6MDM6MzhBTSArMDAwMCwgQ2hyaXMgV2lsc29uIHdy b3RlOgo+IE9uIFdlZCwgTm92IDA0LCAyMDE1IGF0IDExOjIwOjA3UE0gKzAyMDAsIHZpbGxlLnN5 cmphbGFAbGludXguaW50ZWwuY29tIHdyb3RlOgo+ID4gRnJvbTogVmlsbGUgU3lyasOkbMOkIDx2 aWxsZS5zeXJqYWxhQGxpbnV4LmludGVsLmNvbT4KPiA+IAo+ID4gV2hlbiByZWdpc3RlciB0eXBl IHNhZmV0eSBoYXBwZW5zLCB3ZSBjYW4ndCBqdXN0IHRyeSB0byBlbWl0IHRoZQo+ID4gcmVnaXN0 ZXIgaXRzZWxmIHRvIHRoZSByaW5nLiBJbnN0ZWFkIHdlJ2xsIG5lZWQgdG8gZXh0cmFjdCB0aGUK PiA+IG9mZnNldCBmcm9tIGl0IGZpcnN0LiBBZGQgc29tZSBjb252ZW5pZW5jZSBmdW5jdGlvbnMg dGhhdCB3aWxsIGRvCj4gPiB0aGF0Lgo+ID4gCj4gPiB2MjogQ29udmVydCBNT0NTIHNldHVwIHRv bwo+ID4gCj4gPiBTaWduZWQtb2ZmLWJ5OiBWaWxsZSBTeXJqw6Rsw6QgPHZpbGxlLnN5cmphbGFA bGludXguaW50ZWwuY29tPgo+IAo+IFRoZSBvbmx5IGluc2FuZSB0aGluZyBhYm91dCB0aGlzIHBh dGNoIGlzIHRoZSBzdHVwaWQgcmluZyBlbWlzc2lvbiBBUEkuCgpPbmUgZXh0cmEgaWRlYSBqdXN0 IHBvcHBlZCB0byBteSBtaW5kLiBTaG91bGQgSSBtYXliZSBtYWtlIHRoZQplbWl0X3JlZygpIHRh a2UgdGhlIHZhbHVlIHRvbyBhbmQgZW1pdCBib3RoIHRoZSByZWcgb2Zmc2V0IGFuZCB2YWx1ZT8K VGhleSBhbHdheXMgY29tZSBpbiBwYWlycyBhZnRlciBhbGwuCgo+IFJldmlld2VkLWJ5OiBDaHJp cyBXaWxzb24gPGNocmlzQGNocmlzLXdpbHNvbi5jby51az4KPiAtQ2hyaXMKPiAKPiAtLSAKPiBD aHJpcyBXaWxzb24sIEludGVsIE9wZW4gU291cmNlIFRlY2hub2xvZ3kgQ2VudHJlCgotLSAKVmls bGUgU3lyasOkbMOkCkludGVsIE9UQwpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fXwpJbnRlbC1nZnggbWFpbGluZyBsaXN0CkludGVsLWdmeEBsaXN0cy5mcmVl ZGVza3RvcC5vcmcKaHR0cDovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZv L2ludGVsLWdmeAo=