Re: [PATCH] drm/i915: get runtime PM reference around GEM set_caching IOCTL

From: Daniel Vetter <daniel@ffwll.ch>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/i915: get runtime PM reference around GEM set_caching IOCTL
Date: Tue, 17 Nov 2015 20:00:55 +0100	[thread overview]
Message-ID: <20151117190055.GX16848@phenom.ffwll.local> (raw)
In-Reply-To: <CA+gsUGSMRg4eEFg2iXHkknKpmyd=nVyJjXWUdpjm5qM+eYh=LA@mail.gmail.com>

On Wed, Nov 04, 2015 at 05:47:12PM -0200, Paulo Zanoni wrote:
> 2015-11-04 17:25 GMT-02:00 Imre Deak <imre.deak@intel.com>:
> > After Damien's D3 fix I started to get runtime suspend residency for the
> > first time and that revealed a breakage on the set_caching IOCTL path
> > that accesses the HW but doesn't take an RPM ref. Fix this up.
> 
> Oh, well, that's the the RPM problem that prevents me from sleeping at
> night: how can we be 100% sure we wrapped every single possible driver
> entry point? At least we shout errors and warns when we detect the
> problem.
> 
> By the way, we already have some tests for specific IOCTLs on
> igt/pm_rpm, so adding a new one for this IOCTL wouldn't hurt :)

Yeah, rpm subtests for set_caching and set_tiling are indeed missing.
Imre, can you please add them?

Thanks, Daniel

> 
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> >
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_gem.c | 8 +++++++-
> >  1 file changed, 7 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> > index f1e3fde..56cd501 100644
> > --- a/drivers/gpu/drm/i915/i915_gem.c
> > +++ b/drivers/gpu/drm/i915/i915_gem.c
> > @@ -3829,6 +3829,7 @@ int i915_gem_get_caching_ioctl(struct drm_device *dev, void *data,
> >  int i915_gem_set_caching_ioctl(struct drm_device *dev, void *data,
> >                                struct drm_file *file)
> >  {
> > +       struct drm_i915_private *dev_priv = dev->dev_private;
> >         struct drm_i915_gem_caching *args = data;
> >         struct drm_i915_gem_object *obj;
> >         enum i915_cache_level level;
> > @@ -3857,9 +3858,11 @@ int i915_gem_set_caching_ioctl(struct drm_device *dev, void *data,
> >                 return -EINVAL;
> >         }
> >
> > +       intel_runtime_pm_get(dev_priv);
> > +
> >         ret = i915_mutex_lock_interruptible(dev);
> >         if (ret)
> > -               return ret;
> > +               goto rpm_put;
> >
> >         obj = to_intel_bo(drm_gem_object_lookup(dev, file, args->handle));
> >         if (&obj->base == NULL) {
> > @@ -3872,6 +3875,9 @@ int i915_gem_set_caching_ioctl(struct drm_device *dev, void *data,
> >         drm_gem_object_unreference(&obj->base);
> >  unlock:
> >         mutex_unlock(&dev->struct_mutex);
> > +rpm_put:
> > +       intel_runtime_pm_put(dev_priv);
> > +
> >         return ret;
> >  }
> >
> > --
> > 2.1.4
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
> 
> -- 
> Paulo Zanoni
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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