* [PATCH] lib: Add Skylake Intel Graphics GT4 PCI IDs
@ 2015-11-06 14:42 Mika Kuoppala
2015-11-18 15:49 ` Damien Lespiau
0 siblings, 1 reply; 2+ messages in thread
From: Mika Kuoppala @ 2015-11-06 14:42 UTC (permalink / raw)
To: intel-gfx
Add Skylake Intel Graphics GT4 PCI IDs.
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
---
lib/intel_chipset.h | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
index 6fcc244..93bf565 100644
--- a/lib/intel_chipset.h
+++ b/lib/intel_chipset.h
@@ -198,13 +198,17 @@ void intel_check_pch(void);
#define PCI_CHIP_SKYLAKE_ULX_GT2 0x191E
#define PCI_CHIP_SKYLAKE_DT_GT2 0x1912
#define PCI_CHIP_SKYLAKE_DT_GT1 0x1902
+#define PCI_CHIP_SKYLAKE_DT_GT4 0x1932
#define PCI_CHIP_SKYLAKE_HALO_GT2 0x191B
#define PCI_CHIP_SKYLAKE_HALO_GT3 0x192B
#define PCI_CHIP_SKYLAKE_HALO_GT1 0x190B
+#define PCI_CHIP_SKYLAKE_HALO_GT4 0x193B
#define PCI_CHIP_SKYLAKE_SRV_GT2 0x191A
#define PCI_CHIP_SKYLAKE_SRV_GT3 0x192A
#define PCI_CHIP_SKYLAKE_SRV_GT1 0x190A
+#define PCI_CHIP_SKYLAKE_SRV_GT4 0x193A
#define PCI_CHIP_SKYLAKE_WKS_GT2 0x191D
+#define PCI_CHIP_SKYLAKE_WKS_GT4 0x193D
#define PCI_CHIP_KABYLAKE_ULT_GT2 0x5916
#define PCI_CHIP_KABYLAKE_ULT_GT1_5 0x5913
@@ -409,6 +413,11 @@ void intel_check_pch(void);
(devid) == PCI_CHIP_SKYLAKE_HALO_GT3 || \
(devid) == PCI_CHIP_SKYLAKE_SRV_GT3)
+#define IS_SKL_GT4(devid) ((devid) == PCI_CHIP_SKYLAKE_DT_GT4 || \
+ (devid) == PCI_CHIP_SKYLAKE_HALO_GT4 || \
+ (devid) == PCI_CHIP_SKYLAKE_WKS_GT4 || \
+ (devid) == PCI_CHIP_SKYLAKE_SRV_GT4)
+
#define IS_KBL_GT1(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT1_5|| \
(devid) == PCI_CHIP_KABYLAKE_ULX_GT1_5|| \
(devid) == PCI_CHIP_KABYLAKE_DT_GT1_5|| \
@@ -437,7 +446,8 @@ void intel_check_pch(void);
#define IS_SKYLAKE(devid) (IS_KABYLAKE(devid) || \
IS_SKL_GT1(devid) || \
IS_SKL_GT2(devid) || \
- IS_SKL_GT3(devid))
+ IS_SKL_GT3(devid) || \
+ IS_SKL_GT4(devid))
#define IS_BROXTON(devid) ((devid) == PCI_CHIP_BROXTON_0 || \
(devid) == PCI_CHIP_BROXTON_1 || \
--
2.5.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] lib: Add Skylake Intel Graphics GT4 PCI IDs
2015-11-06 14:42 [PATCH] lib: Add Skylake Intel Graphics GT4 PCI IDs Mika Kuoppala
@ 2015-11-18 15:49 ` Damien Lespiau
0 siblings, 0 replies; 2+ messages in thread
From: Damien Lespiau @ 2015-11-18 15:49 UTC (permalink / raw)
To: Mika Kuoppala; +Cc: intel-gfx
On Fri, Nov 06, 2015 at 04:42:10PM +0200, Mika Kuoppala wrote:
> Add Skylake Intel Graphics GT4 PCI IDs.
>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
--
Damien
> ---
> lib/intel_chipset.h | 12 +++++++++++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
> index 6fcc244..93bf565 100644
> --- a/lib/intel_chipset.h
> +++ b/lib/intel_chipset.h
> @@ -198,13 +198,17 @@ void intel_check_pch(void);
> #define PCI_CHIP_SKYLAKE_ULX_GT2 0x191E
> #define PCI_CHIP_SKYLAKE_DT_GT2 0x1912
> #define PCI_CHIP_SKYLAKE_DT_GT1 0x1902
> +#define PCI_CHIP_SKYLAKE_DT_GT4 0x1932
> #define PCI_CHIP_SKYLAKE_HALO_GT2 0x191B
> #define PCI_CHIP_SKYLAKE_HALO_GT3 0x192B
> #define PCI_CHIP_SKYLAKE_HALO_GT1 0x190B
> +#define PCI_CHIP_SKYLAKE_HALO_GT4 0x193B
> #define PCI_CHIP_SKYLAKE_SRV_GT2 0x191A
> #define PCI_CHIP_SKYLAKE_SRV_GT3 0x192A
> #define PCI_CHIP_SKYLAKE_SRV_GT1 0x190A
> +#define PCI_CHIP_SKYLAKE_SRV_GT4 0x193A
> #define PCI_CHIP_SKYLAKE_WKS_GT2 0x191D
> +#define PCI_CHIP_SKYLAKE_WKS_GT4 0x193D
>
> #define PCI_CHIP_KABYLAKE_ULT_GT2 0x5916
> #define PCI_CHIP_KABYLAKE_ULT_GT1_5 0x5913
> @@ -409,6 +413,11 @@ void intel_check_pch(void);
> (devid) == PCI_CHIP_SKYLAKE_HALO_GT3 || \
> (devid) == PCI_CHIP_SKYLAKE_SRV_GT3)
>
> +#define IS_SKL_GT4(devid) ((devid) == PCI_CHIP_SKYLAKE_DT_GT4 || \
> + (devid) == PCI_CHIP_SKYLAKE_HALO_GT4 || \
> + (devid) == PCI_CHIP_SKYLAKE_WKS_GT4 || \
> + (devid) == PCI_CHIP_SKYLAKE_SRV_GT4)
> +
> #define IS_KBL_GT1(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT1_5|| \
> (devid) == PCI_CHIP_KABYLAKE_ULX_GT1_5|| \
> (devid) == PCI_CHIP_KABYLAKE_DT_GT1_5|| \
> @@ -437,7 +446,8 @@ void intel_check_pch(void);
> #define IS_SKYLAKE(devid) (IS_KABYLAKE(devid) || \
> IS_SKL_GT1(devid) || \
> IS_SKL_GT2(devid) || \
> - IS_SKL_GT3(devid))
> + IS_SKL_GT3(devid) || \
> + IS_SKL_GT4(devid))
>
> #define IS_BROXTON(devid) ((devid) == PCI_CHIP_BROXTON_0 || \
> (devid) == PCI_CHIP_BROXTON_1 || \
> --
> 2.5.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 2+ messages in thread
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