Re: [PATCH 1/3] drm/i915: Suppress spurious CPU FIFO underruns on ILK-IVB

Chris Wilson
2015-11-23T14:28:35Z

On Mon, Nov 23, 2015 at 04:22:08PM +0200, Ville Syrjälä wrote:
> On Sat, Nov 21, 2015 at 10:51:50AM +0000, Chris Wilson wrote:
> > On Fri, Nov 20, 2015 at 10:09:18PM +0200, ville.syrjala@linux.intel.com wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >
> > > We still get spurious pipe underruns on ILK/SNB/IVB under two
> > > circumstances when dealing with PCH ports:
> > > * When the pipe has been disabled, but FDI RX/TX is still enabled
> > > * During FDI link training
> > >
> > > Both cases seem to happen at least when we do VGA+HDMI cloning
> > > from the same pipe. I don't think I've seen them when not cloning,
> > > but can't be 100% sure.
> > >
> > > Disable underrun reporting around those places to eliminate the
> > > dmesg errors.
> > >
> > > Testcase: igt/kms_setmode/basic-clone-single-crtc
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
> >
> > I wondered if logging the suppressed errors would be of any use?
>
> Hmm. Maybe just to confirm that they still happen, and thus suppressing
> is still neded.
>
> > Does
> > the check_cpu_fifo work if the reporting is disabled? Could we do a
> > manual check and DRM_DEBUG_KMS() if the enable did generate a failure.
> > If the check_cpu_fifo does work, won't we still get the error from the
> > added check in atomic_commit()?
>
> The check only looks at pipes that have underrun reporting enabled. I
> suppose it might be possible to have it check all the pipes. At the
> point where we call it no explicit suppression should be happening, so
> the only reason why underrun reporting would be disabled on any pipe is
> due to detecting a previous underrun via the interrupt.

Does the hw flag the underrun even if the interrupt is disabled?
(Playing games with PIPESTAT_IER?) Could we then report (debug) that an
underrun happened before we re-enable reporting?
-Chris

--
Chris Wilson, Intel Open Source Technology Centre