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From: Daniel Vetter <daniel@ffwll.ch>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Remove PSR Perf Counter for SKL+
Date: Tue, 24 Nov 2015 13:33:19 +0100	[thread overview]
Message-ID: <20151124123319.GT17050@phenom.ffwll.local> (raw)
In-Reply-To: <1448317000-23722-1-git-send-email-rodrigo.vivi@intel.com>

On Mon, Nov 23, 2015 at 02:16:40PM -0800, Rodrigo Vivi wrote:
> Whenever DMC firmware put the HW into DC State a bunch
> of registers including this perf counter is reset to 0.
> 
> Even with PSR active and working we could still read
> "Performance_Counter: 0" what will misslead people to believe
> PSR is broken. For instance on SKL we can only see PC10
> residency with screen on if PSR is working properly.
> However Performance_Counter was showing 0.
> 
> Even if it restored properly on DC6 exit we don't want to
> give users the wrong impression that PSR is not working
> while we know for sure it is.
> 
> So, it is better to remove this counter information while
> we don't have a better way to track PSR residency.
> 
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Reviewed-by: Durgadoss R <durgadoss.r@intel.com>

Queued for -next, thanks for the patch.
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index b28da6f..a728ff1 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2582,8 +2582,11 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
>  		}
>  	seq_puts(m, "\n");
>  
> -	/* CHV PSR has no kind of performance counter */
> -	if (HAS_DDI(dev)) {
> +	/*
> +	 * VLV/CHV PSR has no kind of performance counter
> +	 * SKL+ Perf counter is reset to 0 everytime DC state is entered
> +	 */
> +	if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {
>  		psrperf = I915_READ(EDP_PSR_PERF_CNT) &
>  			EDP_PSR_PERF_CNT_MASK;
>  
> -- 
> 2.4.3
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2015-11-24 12:33 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-19  0:39 [PATCH 0/3] More PSR improvements Rodrigo Vivi
2015-11-19  0:39 ` [PATCH 1/3] drm/i915: Also delay first activation for SKL+ Rodrigo Vivi
2015-11-19  6:07   ` R, Durgadoss
2015-11-19  8:44   ` Daniel Stone
2015-11-19 18:45     ` Vivi, Rodrigo
2015-11-19  0:39 ` [PATCH 2/3] drm/i915: Remove PSR Perf Counter " Rodrigo Vivi
2015-11-19  6:09   ` R, Durgadoss
2015-11-19  7:45     ` Jindal, Sonika
2015-11-19 18:31       ` Rodrigo Vivi
2015-11-20  6:01         ` Jindal, Sonika
2015-11-20 19:14           ` Vivi, Rodrigo
2015-11-23 22:16             ` [PATCH] " Rodrigo Vivi
2015-11-24 12:33               ` Daniel Vetter [this message]
2015-11-19  0:39 ` [PATCH 3/3] drm/i915: Also disable PSR on Sink when disabling it on Source Rodrigo Vivi
2015-11-19  4:26   ` Jindal, Sonika
2015-11-23 22:19     ` [PATCH] " Rodrigo Vivi
2015-11-24  4:40       ` Jindal, Sonika
2015-11-24 12:34         ` Daniel Vetter

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