Re: [PATCH 07/10] drm/i915: Disable FDI after the CRT port on LPT-H

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Wed, Dec 02, 2015 at 12:01:43PM -0200, Paulo Zanoni wrote:
> 2015-12-01 11:08 GMT-02:00  <ville.syrjala@linux.intel.com>:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Bspec modeset sequence tells us to disable the PCH transcoder and
> > FDI after the CRT port on LPT-H, so let's do that.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c | 11 +++++------
> >  1 file changed, 5 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 55419e4d032c..1dc125b6dcdc 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -5159,18 +5159,17 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
> >         if (!intel_crtc->config->has_dsi_encoder)
> >                 intel_ddi_disable_pipe_clock(intel_crtc);
> >
> > -       if (intel_crtc->config->has_pch_encoder) {
> > -               lpt_disable_pch_transcoder(dev_priv);
> > -               intel_ddi_fdi_disable(crtc);
> > -       }
> > -
> >         for_each_encoder_on_crtc(dev, crtc, encoder)
> >                 if (encoder->post_disable)
> >                         encoder->post_disable(encoder);
> 
> On HAS_DDI platforms, encoder->post_disable() is unset.

Hmm. It should be set for CRT... except it isn't. I guess I chickened
out on LPT when I fixed the other PCH platforms. I'll need to fix this
too then, and then redo some testing.

> 
> Also, this commit is a revert of commit
> 97b040aa391651793e4d463408c137b81517cc90.

Hmm. OK, so we had the SPLL disable in the post_disable hook, which was
correct as far as the modeset sequence goes, but the port disable was
always in the wrong place. SPLL was then converted into a shared pll
which moved the SPLL disable out from post_disable to some higher level
code, leaving the door open to fixing the rest of the modeset sequence.

If we still had the SPLL disable in the crt code, we'd have to move it
to the post_pll_disable hook instead, but since it's a shared pll now we
don't have to do anything.

> 
> >
> > -       if (intel_crtc->config->has_pch_encoder)
> > +       if (intel_crtc->config->has_pch_encoder) {
> > +               lpt_disable_pch_transcoder(dev_priv);
> > +               intel_ddi_fdi_disable(crtc);
> > +
> >                 intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
> >                                                       true);
> > +       }
> >  }
> >
> >  static void i9xx_pfit_enable(struct intel_crtc *crtc)
> > --
> > 2.4.10
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
> 
> -- 
> Paulo Zanoni

-- 
Ville Syrjälä
Intel OTC
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