From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 09/10] drm/i915: Disable LPT-H VGA dotclock during crtc disable
Date: Thu, 3 Dec 2015 12:29:11 +0200 [thread overview]
Message-ID: <20151203102911.GC4437@intel.com> (raw)
In-Reply-To: <CA+gsUGRtPEsbyN7_1LTRRqY45ttLn3TaiD-ZN7=6Stva0MiYTg@mail.gmail.com>
On Wed, Dec 02, 2015 at 03:02:20PM -0200, Paulo Zanoni wrote:
> 2015-12-01 11:08 GMT-02:00 <ville.syrjala@linux.intel.com>:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Currently we leave the LPT-H VGA dotclock running after turning
> > the pipe/fdi/port/etc. Propoerly disable the VGA dotclock as
>
> s/Propoerly/Properly/
>
> (DId you also notice that steps 13 and 18 are the same?)
No I didn't. That's a bit weird. I did notice that there seems to be an
off by one when it talks about dealing with FDI training failure. It
says:
"To retry FDI training, follow the Disable Sequence steps to Disable FDI,
but skip the steps related to clocks and PLLs (16, 19, and 20), ..."
But actually it should says "17, 20, and 21"
Which now makes me wonder that maybe they meant to move the FDI RX
disable to step 13 at some point, but simply forgot to remove it
from the old place in the sequence. That could explain the off by
one, and it would be more symmetrical with the enable sequence. We
seem to do the FDI RX disable at step 18 currently.
>
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> > specified in the modeset sequence.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 322a35c67870..5e74456a90aa 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -5171,6 +5171,7 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
> >
> > if (intel_crtc->config->has_pch_encoder) {
> > lpt_disable_pch_transcoder(dev_priv);
> > + lpt_disable_iclkip(dev_priv);
> > intel_ddi_fdi_disable(crtc);
> >
> > intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
> > --
> > 2.4.10
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
>
> --
> Paulo Zanoni
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-12-03 10:29 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-01 13:08 [PATCH 00/10] HSW/BDW PCH modeset fixes and stuff ville.syrjala
2015-12-01 13:08 ` [PATCH 01/10] drm/i915: Don't register the CRT connector when it's fused off ville.syrjala
2015-12-01 19:05 ` Paulo Zanoni
2015-12-01 19:18 ` Ville Syrjälä
2015-12-01 21:28 ` [PATCH v2 01/10] drm/i915: Don't register the CRT connector when it's fused off on LPT-H ville.syrjala
2015-12-01 13:08 ` [PATCH 02/10] drm/i915: Don't register CRT connectro when DDI E can't be used ville.syrjala
2015-12-01 19:13 ` Paulo Zanoni
2015-12-01 21:29 ` [PATCH v2 02/10] drm/i915: Don't register CRT connector " ville.syrjala
2015-12-01 13:08 ` [PATCH 03/10] drm/i915: Check VBT for CRT port presence on HSW/BDW ville.syrjala
2015-12-01 13:41 ` Chris Wilson
2015-12-01 13:57 ` Ville Syrjälä
2015-12-01 14:06 ` Chris Wilson
2015-12-01 14:19 ` Ville Syrjälä
2015-12-01 16:07 ` [PATCH v2 " ville.syrjala
2015-12-01 18:15 ` Ville Syrjälä
2015-12-01 19:28 ` Paulo Zanoni
2015-12-01 19:40 ` Ville Syrjälä
2015-12-01 21:31 ` [PATCH v3 " ville.syrjala
2015-12-01 13:08 ` [PATCH 04/10] drm/i915: Add "missing" break to haswell_get_ddi_pll() ville.syrjala
2015-12-01 19:34 ` Paulo Zanoni
2015-12-01 19:45 ` Ville Syrjälä
2015-12-01 21:32 ` [PATCH v2 " ville.syrjala
2015-12-02 9:29 ` Ville Syrjälä
2015-12-01 13:08 ` [PATCH 05/10] drm/i915: Disable CLKOUT_DP bending on LPT/WPT as needed ville.syrjala
2015-12-02 13:35 ` Paulo Zanoni
2015-12-03 10:03 ` Ville Syrjälä
2015-12-03 11:16 ` Paulo Zanoni
2015-12-04 20:19 ` [PATCH v2 " ville.syrjala
2015-12-07 16:54 ` Paulo Zanoni
2015-12-01 13:08 ` [PATCH 06/10] drm/i915: Round to closest when computing the VGA dotclock for LPT-H ville.syrjala
2015-12-02 13:45 ` Paulo Zanoni
2015-12-04 20:20 ` [PATCH v2 " ville.syrjala
2015-12-01 13:08 ` [PATCH 07/10] drm/i915: Disable FDI after the CRT port on LPT-H ville.syrjala
2015-12-02 14:01 ` Paulo Zanoni
2015-12-03 10:14 ` Ville Syrjälä
2015-12-04 20:20 ` [PATCH v2 " ville.syrjala
2015-12-07 17:51 ` Paulo Zanoni
2015-12-07 18:57 ` Ville Syrjälä
2015-12-08 14:04 ` Ville Syrjälä
2015-12-08 14:05 ` [PATCH] " ville.syrjala
2015-12-01 13:08 ` [PATCH 08/10] drm/i915: Refactor LPT-H VGA dotclock disabling ville.syrjala
2015-12-02 16:56 ` Paulo Zanoni
2015-12-03 10:15 ` Ville Syrjälä
2015-12-04 20:21 ` [PATCH v2 " ville.syrjala
2015-12-01 13:08 ` [PATCH 09/10] drm/i915: Disable LPT-H VGA dotclock during crtc disable ville.syrjala
2015-12-02 17:02 ` Paulo Zanoni
2015-12-03 10:29 ` Ville Syrjälä [this message]
2015-12-04 20:22 ` [PATCH v2 " ville.syrjala
2015-12-01 13:08 ` [PATCH 10/10] drm/i915: Leave FDI running after failed link training on LPT-H ville.syrjala
2015-12-02 17:16 ` Paulo Zanoni
2015-12-03 10:30 ` Ville Syrjälä
2015-12-04 10:09 ` Daniel Vetter
2015-12-04 11:59 ` Ville Syrjälä
2015-12-04 20:22 ` [PATCH v2 " ville.syrjala
2015-12-08 14:32 ` [PATCH 00/10] HSW/BDW PCH modeset fixes and stuff Ville Syrjälä
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