Re: [PATCH v2 02/12] drm/i915: Calculate watermark related members in the crtc_state, v4.

[Daniel Vetter <daniel@ffwll.ch>]

On Thu, Dec 03, 2015 at 01:49:13PM +0100, Maarten Lankhorst wrote:
> This removes pre/post_wm_update from intel_crtc->atomic, and
> creates atomic state for it in intel_crtc.
>     
> Changes since v1:
> - Rebase on top of wm changes.
> Changes since v2:
> - Split disable_cxsr into a separate patch.
> Changes since v3:
> - Move some of the changes to intel_wm_need_update.
> 
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> ---
> diff --git a/drivers/gpu/drm/i915/intel_atomic.c b/drivers/gpu/drm/i915/intel_atomic.c
> index 9f0638a37b6d..4625f8a9ba12 100644
> --- a/drivers/gpu/drm/i915/intel_atomic.c
> +++ b/drivers/gpu/drm/i915/intel_atomic.c
> @@ -96,6 +96,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
>  	crtc_state->update_pipe = false;
>  	crtc_state->disable_lp_wm = false;
>  	crtc_state->disable_cxsr = false;
> +	crtc_state->wm_changed = false;
>  
>  	return &crtc_state->base;
>  }
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 029777f75de8..b96419fd4c9e 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4767,6 +4767,8 @@ intel_pre_disable_primary(struct drm_crtc *crtc)
>  static void intel_post_plane_update(struct intel_crtc *crtc)
>  {
>  	struct intel_crtc_atomic_commit *atomic = &crtc->atomic;
> +	struct intel_crtc_state *pipe_config =
> +		to_intel_crtc_state(crtc->base.state);
>  	struct drm_device *dev = crtc->base.dev;
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  
> @@ -4777,7 +4779,7 @@ static void intel_post_plane_update(struct intel_crtc *crtc)
>  
>  	crtc->wm.cxsr_allowed = true;
>  
> -	if (crtc->atomic.update_wm_post)
> +	if (pipe_config->wm_changed)
>  		intel_update_watermarks(&crtc->base);
>  
>  	if (atomic->update_fbc)
> @@ -4810,6 +4812,9 @@ static void intel_pre_plane_update(struct intel_crtc *crtc)
>  		crtc->wm.cxsr_allowed = false;
>  		intel_set_memory_cxsr(dev_priv, false);
>  	}
> +
> +	if (!needs_modeset(&pipe_config->base) && pipe_config->wm_changed)
> +		intel_update_watermarks(&crtc->base);
>  }
>  
>  static void intel_crtc_disable_planes(struct drm_crtc *crtc, unsigned plane_mask)
> @@ -11674,9 +11679,14 @@ static bool intel_wm_need_update(struct drm_plane *plane,
>  	struct intel_plane_state *cur = to_intel_plane_state(plane->state);
>  
>  	/* Update watermarks on tiling or size changes. */
> -	if (!plane->state->fb || !state->fb ||
> -	    plane->state->fb->modifier[0] != state->fb->modifier[0] ||
> -	    plane->state->rotation != state->rotation ||
> +	if (new->visible != cur->visible)
> +		return true;
> +
> +	if (!cur->base.fb || !new->base.fb)
> +		return false;
> +
> +	if (cur->base.fb->modifier[0] != new->base.fb->modifier[0] ||
> +	    cur->base.rotation != new->base.rotation ||
>  	    drm_rect_width(&new->src) != drm_rect_width(&cur->src) ||
>  	    drm_rect_height(&new->src) != drm_rect_height(&cur->src) ||
>  	    drm_rect_width(&new->dst) != drm_rect_width(&cur->dst) ||
> @@ -11746,17 +11756,9 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
>  			 plane->base.id, was_visible, visible,
>  			 turn_off, turn_on, mode_changed);
>  
> -	if (turn_on) {
> -		intel_crtc->atomic.update_wm_pre = true;
> -		/* must disable cxsr around plane enable/disable */
> -		if (plane->type != DRM_PLANE_TYPE_CURSOR) {
> -			pipe_config->disable_cxsr = true;
> -			/* to potentially re-enable cxsr */
> -			intel_crtc->atomic.wait_vblank = true;
> -			intel_crtc->atomic.update_wm_post = true;
> -		}
> -	} else if (turn_off) {
> -		intel_crtc->atomic.update_wm_post = true;
> +	if (turn_on || turn_off) {
> +		pipe_config->wm_changed = true;
> +
>  		/* must disable cxsr around plane enable/disable */
>  		if (plane->type != DRM_PLANE_TYPE_CURSOR) {
>  			if (is_crtc_enabled)
> @@ -11764,7 +11766,7 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
>  			pipe_config->disable_cxsr = true;
>  		}
>  	} else if (intel_wm_need_update(plane, plane_state)) {
> -		intel_crtc->atomic.update_wm_pre = true;
> +		pipe_config->wm_changed = true;
>  	}
>  
>  	if (visible || was_visible)
> @@ -11909,7 +11911,7 @@ static int intel_crtc_atomic_check(struct drm_crtc *crtc,
>  	}
>  
>  	if (mode_changed && !crtc_state->active)
> -		intel_crtc->atomic.update_wm_post = true;
> +		pipe_config->wm_changed = true;
>  
>  	if (mode_changed && crtc_state->enable &&
>  	    dev_priv->display.crtc_compute_clock &&
> @@ -13809,9 +13811,6 @@ static void intel_begin_crtc_commit(struct drm_crtc *crtc,
>  		to_intel_crtc_state(old_crtc_state);
>  	bool modeset = needs_modeset(crtc->state);
>  
> -	if (intel_crtc->atomic.update_wm_pre)
> -		intel_update_watermarks(crtc);
> -
>  	/* Perform vblank evasion around commit operation */
>  	intel_pipe_update_start(intel_crtc);
>  
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 53405cdc01f4..4f5d0949137e 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -372,6 +372,7 @@ struct intel_crtc_state {
>  
>  	bool update_pipe; /* can a fast modeset be performed? */
>  	bool disable_cxsr;
> +	bool wm_changed; /* watermarks are updated */
>  
>  	/* Pipe source size (ie. panel fitter input size)
>  	 * All planes will be positioned inside this space,
> @@ -535,7 +536,6 @@ struct intel_crtc_atomic_commit {
>  	bool disable_fbc;
>  	bool disable_ips;
>  	bool pre_disable_primary;
> -	bool update_wm_pre, update_wm_post;
>  
>  	/* Sleepable operations to perform after commit */
>  	unsigned fb_bits;
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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