From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Deepak M <m.deepak@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/3] drm/i915: Correct the Ref clock value for BXT
Date: Fri, 4 Dec 2015 11:55:56 +0200 [thread overview]
Message-ID: <20151204095556.GO4437@intel.com> (raw)
In-Reply-To: <1449238659-12473-2-git-send-email-m.deepak@intel.com>
On Fri, Dec 04, 2015 at 07:47:38PM +0530, Deepak M wrote:
> The reference clock for BXT is 19.2 MHz not 19.5 MHz, updating the
> correct value here.
>
> Signed-off-by: Deepak M <m.deepak@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 8bd2699..009f474 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7676,7 +7676,7 @@ enum skl_disp_power_wells {
> #define BXT_DSI_PLL_RATIO_MAX 0x7D
> #define BXT_DSI_PLL_RATIO_MIN 0x22
> #define BXT_DSI_PLL_RATIO_MASK 0xFF
> -#define BXT_REF_CLOCK_KHZ 19500
> +#define BXT_REF_CLOCK_KHZ 19200
No idea why we have this define in i915_reg.h. We don't have such
defines for other platforms (also my fix CHV refclk to 19.2MHz patch
never got reviewed by anyone either. Interedted?)
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> #define BXT_DSI_PLL_ENABLE 0x46080
> #define BXT_DSI_PLL_DO_ENABLE (1 << 31)
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-12-04 9:56 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-04 14:17 [PATCH 1/3] drm/i915: Add DPI FIFO empty status check Deepak M
2015-12-04 9:49 ` Ville Syrjälä
2015-12-04 9:55 ` Deepak, M
2015-12-04 16:11 ` [PATCH] " Deepak M
2015-12-04 11:26 ` Ville Syrjälä
2015-12-09 11:35 ` Deepak M
2015-12-09 14:34 ` Ville Syrjälä
2015-12-10 9:08 ` Daniel Vetter
2016-01-22 8:31 ` Jani Nikula
2015-12-04 14:17 ` [PATCH 2/3] drm/i915: Correct the Ref clock value for BXT Deepak M
2015-12-04 9:55 ` Ville Syrjälä [this message]
2015-12-04 16:22 ` Daniel Vetter
2015-12-04 16:25 ` Deepak, M
2015-12-04 17:20 ` Ville Syrjälä
2015-12-04 14:17 ` [PATCH 3/3] drm/i915: Use the ceil value for the additional clk divider Deepak M
2015-12-04 11:51 ` Ville Syrjälä
2015-12-04 16:59 ` Deepak, M
2016-01-20 11:06 ` [PATCH 1/3] drm/i915: Add DPI FIFO empty status check Mika Kahola
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20151204095556.GO4437@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=m.deepak@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox