From: Daniel Vetter <daniel@ffwll.ch>
To: ville.syrjala@linux.intel.com
Cc: intel-gfx@lists.freedesktop.org, Mark Kettenis <mark.kettenis@xs4all.nl>
Subject: Re: [PATCH] drm/i915: Enable GSE interrupt on BDW+
Date: Fri, 4 Dec 2015 11:41:38 +0100 [thread overview]
Message-ID: <20151204104138.GP10243@phenom.ffwll.local> (raw)
In-Reply-To: <1449008230-11869-1-git-send-email-ville.syrjala@linux.intel.com>
On Wed, Dec 02, 2015 at 12:17:10AM +0200, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We've never actually enabled or unmasked the GSE interrupt on BDW+,
> even though the interrupt handler was always prepared for it.
> Let's enable it and see what happens.
>
> Credit to Mark Kettenis who fixed this in the OpenBSD fork of the
> driver. He reports that it fixed the "ACPI _BCM/_BCQ-based
> brightness mechanism on a MacBookPro12,1 and a 3rd gen Lenovo X1
> Carbon" for them.
>
> References: http://lists.freedesktop.org/archives/intel-gfx/2015-December/081799.html
> Reported-by: Mark Kettenis <mark.kettenis@xs4all.nl>
> Cc: Mark Kettenis <mark.kettenis@xs4all.nl>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Oh dear, there probably goes all our backlight fun. And how did we miss
that DE_MISC wasn't enabled for this long ... but there's indeed nothing
else interesting in there. Imo -fixes, and cc: stable as soon as someone
confirms it fixes something on our end too.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
And big kudos to Mark!
Cheers, Daniel
> ---
> drivers/gpu/drm/i915/i915_irq.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index e88d692583a5..ccdac24039e8 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -3655,6 +3655,7 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
> uint32_t de_pipe_enables;
> u32 de_port_masked = GEN8_AUX_CHANNEL_A;
> u32 de_port_enables;
> + u32 de_misc_masked = GEN8_DE_MISC_GSE;
> enum pipe pipe;
>
> if (INTEL_INFO(dev_priv)->gen >= 9) {
> @@ -3690,6 +3691,7 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
> de_pipe_enables);
>
> GEN5_IRQ_INIT(GEN8_DE_PORT_, ~de_port_masked, de_port_enables);
> + GEN5_IRQ_INIT(GEN8_DE_MISC_, ~de_misc_masked, de_misc_masked);
> }
>
> static int gen8_irq_postinstall(struct drm_device *dev)
> --
> 2.4.10
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-12-04 10:41 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-01 22:17 [PATCH] drm/i915: Enable GSE interrupt on BDW+ ville.syrjala
2015-12-04 10:41 ` Daniel Vetter [this message]
2015-12-04 12:59 ` Jani Nikula
2015-12-07 2:05 ` Aaron Lu
2016-05-19 9:14 ` [PATCH v2] " ville.syrjala
2016-05-23 14:04 ` Jani Nikula
2016-05-23 14:33 ` Mark Kettenis
2016-05-23 14:44 ` Jani Nikula
2016-05-23 15:38 ` Ville Syrjälä
2016-05-19 10:02 ` ✗ Ro.CI.BAT: failure for drm/i915: Enable GSE interrupt on BDW+ (rev2) Patchwork
2016-05-19 11:47 ` Ville Syrjälä
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