From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH] drm/i915/gen9: Correct max save/restore register count during gpu reset with GuC Date: Tue, 19 Jan 2016 20:38:17 +0100 Message-ID: <20160119193817.GM19130@phenom.ffwll.local> References: <1453132776-22229-1-git-send-email-arun.siluvery@linux.intel.com> <569E7CD7.2030301@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mail-wm0-f47.google.com (mail-wm0-f47.google.com [74.125.82.47]) by gabe.freedesktop.org (Postfix) with ESMTPS id 61BF26E851 for ; Tue, 19 Jan 2016 11:38:14 -0800 (PST) Received: by mail-wm0-f47.google.com with SMTP id l65so152243847wmf.1 for ; Tue, 19 Jan 2016 11:38:14 -0800 (PST) Content-Disposition: inline In-Reply-To: <569E7CD7.2030301@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Yu Dai Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org T24gVHVlLCBKYW4gMTksIDIwMTYgYXQgMTA6MTM6NDNBTSAtMDgwMCwgWXUgRGFpIHdyb3RlOgo+ IFRoYW5rcyBmb3IgY2FwdHVyZSB0aGUgdHlwby4gTEdUTS4KPiAKPiBSZXZpZXdlZC1ieTogQWxl eCBEYWkgPHl1LmRhaUBpbnRlbC5jb20+Cj4gCj4gT24gMDEvMTgvMjAxNiAwNzo1OSBBTSwgQXJ1 biBTaWx1dmVyeSB3cm90ZToKPiA+SW4gR3VDIHN1Ym1pc3Npb24gbW9kZSwgZHJpdmVyIGhhcyB0 byBwcm92aWRlIGEgbGlzdCBvZiByZWdpc3RlcnMgdG8gYmUKPiA+c2F2ZS9yZXN0b3JlZCBkdXJp bmcgZ3B1IHJlc2V0LCBtYWtlIHRoZSBtYXggbm8uIG9mIHJlZ2lzdGVycyB2YWx1ZSBjb25zaXN0 ZW50Cj4gPndpdGggdGhhdCBvZiB0aGUgdmFsdWUgZGVmaW5lZCBpbiBGVy4gSWYgdGhleSBhcmUg bm90IGluIHN5bmMgdGhlbiByZWdpc3Rlcgo+ID5zYXZlL3Jlc3RvcmUgZHVyaW5nIGdwdSByZXNl dCB3b24ndCB3b3JrIGFzIGV4cGVjdGVkLgo+ID4KPiA+Q2M6IEFsZXggRGFpIDx5dS5kYWlAaW50 ZWwuY29tPgo+ID5DYzogRGF2ZSBHb3Jkb24gPGRhdmlkLnMuZ29yZG9uQGludGVsLmNvbT4KPiA+ U2lnbmVkLW9mZi1ieTogQXJ1biBTaWx1dmVyeSA8YXJ1bi5zaWx1dmVyeUBsaW51eC5pbnRlbC5j b20+CgpRdWV1ZWQgZm9yIC1uZXh0LCB0aGFua3MgZm9yIHRoZSBwYXRjaC4KLURhbmllbAoKPiA+ LS0tCj4gPiAgZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfZ3VjX2Z3aWYuaCB8IDIgKy0KPiA+ ICAxIGZpbGUgY2hhbmdlZCwgMSBpbnNlcnRpb24oKyksIDEgZGVsZXRpb24oLSkKPiA+Cj4gPmRp ZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9ndWNfZndpZi5oIGIvZHJpdmVy cy9ncHUvZHJtL2k5MTUvaW50ZWxfZ3VjX2Z3aWYuaAo+ID5pbmRleCAxMzBkOTRjLi4xZDgwNDhi IDEwMDY0NAo+ID4tLS0gYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9ndWNfZndpZi5oCj4g PisrKyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX2d1Y19md2lmLmgKPiA+QEAgLTM3MCw3 ICszNzAsNyBAQCBzdHJ1Y3QgZ3VjX3BvbGljaWVzIHsKPiA+ICAjZGVmaW5lIEdVQ19SRUdTRVRf U0FWRV9ERUZBVUxUX1ZBTFVFCTB4OAo+ID4gICNkZWZpbmUgR1VDX1JFR1NFVF9TQVZFX0NVUlJF TlRfVkFMVUUJMHgxMAo+ID4tI2RlZmluZSBHVUNfUkVHU0VUX01BWF9SRUdJU1RFUlMJMjAKPiA+ KyNkZWZpbmUgR1VDX1JFR1NFVF9NQVhfUkVHSVNURVJTCTI1Cj4gPiAgI2RlZmluZSBHVUNfTU1J T19XSElURV9MSVNUX1NUQVJUCTB4MjRkMAo+ID4gICNkZWZpbmUgR1VDX01NSU9fV0hJVEVfTElT VF9NQVgJCTEyCj4gPiAgI2RlZmluZSBHVUNfUzNfU0FWRV9TUEFDRV9QQUdFUwkJMTAKPiAKPiBf X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwo+IEludGVsLWdm eCBtYWlsaW5nIGxpc3QKPiBJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCj4gaHR0cDov L2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeAoKLS0gCkRh bmllbCBWZXR0ZXIKU29mdHdhcmUgRW5naW5lZXIsIEludGVsIENvcnBvcmF0aW9uCmh0dHA6Ly9i bG9nLmZmd2xsLmNoCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9y ZwpodHRwOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4 Cg==