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From: Jeff McGee <jeff.mcgee@intel.com>
To: Peter Antoine <peter.antoine@intel.com>
Cc: daniel.vetter@ffwll.ch, intel-gfx@lists.freedesktop.org,
	dave.gordon@intel.com
Subject: Re: [PATCH 2/3] drm/i915: resize the GuC WOPCM for rc6
Date: Wed, 20 Jan 2016 09:48:41 -0800	[thread overview]
Message-ID: <20160120174841.GA30883@jeffdesk> (raw)
In-Reply-To: <1452265434-25169-3-git-send-email-peter.antoine@intel.com>

On Fri, Jan 08, 2016 at 03:03:53PM +0000, Peter Antoine wrote:
> This patch resizes the GuC WOPCM to so that the GuC and the RC6 memory
> spaces do not overlap.
> 
> Issue: https://jira01.devtools.intel.com/browse/VIZ-6638
> Signed-off-by: Peter Antoine <peter.antoine@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_guc_reg.h     | 3 ++-
>  drivers/gpu/drm/i915/intel_guc_loader.c | 5 +++++
>  2 files changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_guc_reg.h b/drivers/gpu/drm/i915/i915_guc_reg.h
> index 685c799..cb938b0 100644
> --- a/drivers/gpu/drm/i915/i915_guc_reg.h
> +++ b/drivers/gpu/drm/i915/i915_guc_reg.h
> @@ -58,7 +58,8 @@
>  #define GUC_MAX_IDLE_COUNT		_MMIO(0xC3E4)
>  
>  #define GUC_WOPCM_SIZE			_MMIO(0xc050)
> -#define   GUC_WOPCM_SIZE_VALUE  	  (0x80 << 12)	/* 512KB */
> +#define   GUC_WOPCM_SIZE_VALUE		(0x80 << 12)	/* 512KB */
> +#define   BXT_GUC_WOPCM_SIZE_VALUE	(0x70 << 12)	/* 448KB */
>  
>  /* GuC addresses below GUC_WOPCM_TOP don't map through the GTT */
>  #define	GUC_WOPCM_TOP			(GUC_WOPCM_SIZE_VALUE)
There seems to be other references to GUC_WOPCM_SIZE_VALUE including this
one that need to be updated for BXT.
-Jeff

> diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
> index 8182d11..6b17d44 100644
> --- a/drivers/gpu/drm/i915/intel_guc_loader.c
> +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> @@ -305,6 +305,11 @@ static int guc_ucode_xfer(struct drm_i915_private *dev_priv)
>  
>  	/* init WOPCM */
>  	I915_WRITE(GUC_WOPCM_SIZE, GUC_WOPCM_SIZE_VALUE);
> +	if (IS_BROXTON(dev))
> +		I915_WRITE(GUC_WOPCM_SIZE, BXT_GUC_WOPCM_SIZE_VALUE);
> +	else
> +		I915_WRITE(GUC_WOPCM_SIZE, GUC_WOPCM_SIZE_VALUE);
> +
>  	I915_WRITE(DMA_GUC_WOPCM_OFFSET, GUC_WOPCM_OFFSET_VALUE);
>  
>  	/* Enable MIA caching. GuC clock gating is disabled. */
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
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  parent reply	other threads:[~2016-01-20 17:37 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-01-08 15:03 [PATCH 0/3] Enabling GuC Loading on Broxton Peter Antoine
2016-01-08 15:03 ` [PATCH 1/3] drm/i915: Adding Broxton GuC Loader Support Peter Antoine
2016-01-11 16:40   ` Yu Dai
2016-01-08 15:03 ` [PATCH 2/3] drm/i915: resize the GuC WOPCM for rc6 Peter Antoine
2016-01-11 16:40   ` Yu Dai
2016-01-19 23:52   ` Yu Dai
2016-01-20 17:48   ` Jeff McGee [this message]
2016-01-08 15:03 ` [PATCH 3/3] drm/i915: Wait after context init with GuC Submission Peter Antoine
2016-01-08 15:19   ` Chris Wilson
2016-01-11 15:48     ` Antoine, Peter
2016-01-11 16:40   ` Yu Dai
2016-01-11 10:13 ` ✗ warning: Fi.CI.BAT Patchwork
2016-01-12 16:23   ` Daniel Vetter

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