From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2 09/18] drm/i915: Support for extra alignment for tiled surfaces
Date: Mon, 25 Jan 2016 19:55:04 +0200 [thread overview]
Message-ID: <20160125175504.GU23290@intel.com> (raw)
In-Reply-To: <20160125172405.GE11240@phenom.ffwll.local>
On Mon, Jan 25, 2016 at 06:24:05PM +0100, Daniel Vetter wrote:
> On Wed, Jan 20, 2016 at 09:05:30PM +0200, ville.syrjala@linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > SKL+ needs >4K alignment for tiled surfaces, so make
> > intel_compute_page_offset() handle it.
> >
> > The way we do it is first we compute the closest tile boundary
> > as before, and then figure out how many tiles we need to go
> > to reach the desired alignment. The difference in the offset
> > is then added into the x/y offsets.
> >
> > v2: Be less confusing wrt. units (pixels vs. bytes) (Daniel)
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 47 ++++++++++++++++++++++++++++++++----
> > 1 file changed, 42 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index bda3224021b2..a102fabce5b4 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -2459,6 +2459,35 @@ static void intel_unpin_fb_obj(struct drm_framebuffer *fb,
> > }
> >
> > /*
> > + * Adjust the tile offset by moving the difference into
> > + * the x/y offsets.
> > + *
> > + * Input tile dimensions and pitch must already be
> > + * rotated to match x and y, and in pixel units.
> > + */
> > +static void intel_adjust_tile_offset(int *x, int *y,
> > + unsigned int tile_width,
> > + unsigned int tile_height,
> > + unsigned int tile_size,
> > + unsigned int pitch_tiles,
> > + unsigned int old_offset,
> > + unsigned int new_offset)
> > +{
> > + unsigned int tiles;
> > +
> > + WARN_ON(old_offset & (tile_size - 1));
> > + WARN_ON(new_offset & (tile_size - 1));
> > + WARN_ON(new_offset > old_offset);
> > +
> > + tiles = (old_offset - new_offset) / tile_size;
> > + if (tiles == 0)
> > + return;
> > +
> > + *y += tiles / pitch_tiles * tile_height;
> > + *x += tiles % pitch_tiles * tile_width;
> > +}
> > +
> > +/*
> > * Computes the linear offset to the base tile and adjusts
> > * x, y. bytes per pixel is assumed to be a power-of-two.
> > *
> > @@ -2473,6 +2502,12 @@ u32 intel_compute_tile_offset(struct drm_i915_private *dev_priv,
> > unsigned int pitch,
> > unsigned int rotation)
> > {
> > + unsigned int offset, alignment;
> > +
> > + alignment = intel_surf_alignment(dev_priv, fb_modifier);
> > + if (alignment)
> > + alignment--;
>
> Still voting for offset_aligned = ALIGN(offset, ...) per
>
> http://article.gmane.org/gmane.comp.freedesktop.xorg.drivers.intel/72294
>
> (at the very bottom, with the r-b for this patch).
And as I replied there, ALIGN doesn't do what we want.
>
> > +
> > if (fb_modifier != DRM_FORMAT_MOD_NONE) {
> > unsigned int tile_size, tile_width, tile_height;
> > unsigned int tile_rows, tiles, pitch_tiles;
> > @@ -2494,16 +2529,18 @@ u32 intel_compute_tile_offset(struct drm_i915_private *dev_priv,
> > tiles = *x / tile_width;
> > *x %= tile_width;
> >
> > - return (tile_rows * pitch_tiles + tiles) * tile_size;
> > - } else {
> > - unsigned int alignment = intel_linear_alignment(dev_priv) - 1;
> > - unsigned int offset;
> > + offset = (tile_rows * pitch_tiles + tiles) * tile_size;
>
> pitch_tiles seems undefined here, does this compile?
Yes. Diff just likes to make patches hard to read.
> -Daniel
>
> >
> > + intel_adjust_tile_offset(x, y, tile_width, tile_height,
> > + tile_size, pitch_tiles,
> > + offset, offset & ~alignment);
> > + } else {
> > offset = *y * pitch + *x * cpp;
> > *y = (offset & alignment) / pitch;
> > *x = ((offset & alignment) - *y * pitch) / cpp;
> > - return offset & ~alignment;
> > }
> > +
> > + return offset & ~alignment;
> > }
> >
> > static int i9xx_format_to_fourcc(int format)
> > --
> > 2.4.10
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2016-01-25 17:55 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-20 19:05 [PATCH v2 00/18] drm/i915: Handle fb->offsets[] and rewrite fb rotation handling to be more generic (v2) ville.syrjala
2016-01-20 19:05 ` [PATCH 01/18] drm/i915: Rename the rotated gtt view member to 'rotated' ville.syrjala
2016-01-25 16:50 ` Daniel Vetter
2016-01-20 19:05 ` [PATCH 02/18] drm/i915: Pass stride to rotate_pages() ville.syrjala
2016-01-25 16:52 ` Daniel Vetter
2016-01-20 19:05 ` [PATCH 03/18] drm/i915: Pass rotation_info to intel_rotate_fb_obj_pages() ville.syrjala
2016-01-25 16:53 ` Daniel Vetter
2016-01-20 19:05 ` [PATCH 04/18] drm/i915: Make display gtt offsets u32 ville.syrjala
2016-01-25 17:00 ` Daniel Vetter
2016-01-20 19:05 ` [PATCH 05/18] drm/i915: Standardize on 'cpp' for bytes per pixel ville.syrjala
2016-01-25 17:05 ` Daniel Vetter
2016-01-20 19:05 ` [PATCH v2 06/18] drm: Add drm_format_plane_width() and drm_format_plane_height() ville.syrjala
2016-01-25 17:08 ` Daniel Vetter
2016-01-28 18:15 ` Ville Syrjälä
2016-01-29 18:01 ` [PATCH v3 " ville.syrjala
2016-02-09 9:08 ` Daniel Vetter
2016-02-09 15:29 ` [PATCH v4 " ville.syrjala
2016-01-20 19:05 ` [PATCH 07/18] drm/i915: Fix intel_tile_width() parameters ville.syrjala
2016-01-25 17:12 ` Daniel Vetter
2016-01-28 18:35 ` Ville Syrjälä
2016-01-28 19:04 ` Ville Syrjälä
2016-01-20 19:05 ` [PATCH v3 08/18] drm/i915: Pass 90/270 vs. 0/180 rotation info for intel_gen4_compute_page_offset() ville.syrjala
2016-01-25 17:30 ` Daniel Vetter
2016-01-28 18:51 ` Ville Syrjälä
2016-02-10 7:35 ` Daniel Vetter
2016-01-20 19:05 ` [PATCH v2 09/18] drm/i915: Support for extra alignment for tiled surfaces ville.syrjala
2016-01-25 17:24 ` Daniel Vetter
2016-01-25 17:55 ` Ville Syrjälä [this message]
2016-01-20 19:05 ` [PATCH v2 10/18] drm/i915: Don't pass plane+plane_state to intel_pin_and_fence_fb_obj() ville.syrjala
2016-01-20 19:05 ` [PATCH 11/18] drm/i915: Pass drm_frambuffer to intel_compute_page_offset() ville.syrjala
2016-01-20 19:05 ` [PATCH 12/18] drm/i915: Reorganize intel_rotation_info ville.syrjala
2016-01-25 17:38 ` Daniel Vetter
2016-01-25 18:03 ` Ville Syrjälä
2016-01-20 19:05 ` [PATCH 13/18] drm/i915: Move the NULL sg handling out from rotate_pages() ville.syrjala
2016-01-25 17:40 ` Daniel Vetter
2016-01-20 19:05 ` [PATCH 14/18] drm/i915: Embed rotation_info under intel_framebuffer ville.syrjala
2016-01-20 21:08 ` Chris Wilson
2016-01-21 12:06 ` Ville Syrjälä
2016-01-21 12:10 ` Chris Wilson
2016-01-25 17:42 ` Daniel Vetter
2016-01-20 19:05 ` [PATCH v3 15/18] drm/i915: Rewrite fb rotation GTT handling ville.syrjala
2016-01-20 19:05 ` [PATCH v2 16/18] drm/i915: Don't pass pitch to intel_compute_page_offset() ville.syrjala
2016-01-25 17:53 ` Daniel Vetter
2016-01-20 19:05 ` [PATCH 17/18] drm/i915: Pass around plane_state instead of fb+rotation ville.syrjala
2016-01-25 17:55 ` Daniel Vetter
2016-01-20 19:05 ` [PATCH v2 18/18] drm/i915: Make sure fb offset is (macro)pixel aligned ville.syrjala
2016-01-21 13:35 ` ✓ Fi.CI.BAT: success for drm/i915: Handle fb->offsets[] and rewrite fb rotation handling to be more generic (v2) Patchwork
2016-01-30 8:31 ` ✗ Fi.CI.BAT: failure for drm/i915: Handle fb->offsets[] and rewrite fb rotation handling to be more generic (v2) (rev2) Patchwork
2016-02-01 8:31 ` Patchwork
2016-02-09 16:31 ` ✗ Fi.CI.BAT: failure for drm/i915: Handle fb->offsets[] and rewrite fb rotation handling to be more generic (v2) (rev3) Patchwork
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