* [PATCH v3] drm/i915/skl/kbl: Add support for pipe fusing
@ 2016-01-20 14:31 Patrik Jakobsson
2016-01-21 13:20 ` ✓ Fi.CI.BAT: success for drm/i915/skl/kbl: Add support for pipe fusing (rev3) Patchwork
2016-01-28 11:33 ` [PATCH v3] drm/i915/skl/kbl: Add support for pipe fusing Damien Lespiau
0 siblings, 2 replies; 4+ messages in thread
From: Patrik Jakobsson @ 2016-01-20 14:31 UTC (permalink / raw)
To: intel-gfx, damien.lespiau
On SKL and KBL we can have pipe A/B/C disabled by fuse settings. The
pipes must be fused in descending order (e.g. C, B+C, A+B+C). We simply
decrease info->num_pipes if we find a valid fused out config.
v2: Don't store the pipe disabled mask in device info (Damien)
v3: Don't check FUSE_STRAP register for pipe c disabled
Cc: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
---
drivers/gpu/drm/i915/i915_dma.c | 31 +++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/i915_reg.h | 3 +++
2 files changed, 34 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 44a896c..daaa67f 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -814,6 +814,37 @@ static void intel_device_info_runtime_init(struct drm_device *dev)
DRM_INFO("Display fused off, disabling\n");
info->num_pipes = 0;
}
+ } else if (info->num_pipes > 0 && INTEL_INFO(dev)->gen == 9) {
+ u32 dfsm = I915_READ(SKL_DFSM);
+ u8 disabled_mask = 0;
+ bool invalid;
+ int num_bits;
+
+ if (dfsm & SKL_DFSM_PIPE_A_DISABLE)
+ disabled_mask |= BIT(PIPE_A);
+ if (dfsm & SKL_DFSM_PIPE_B_DISABLE)
+ disabled_mask |= BIT(PIPE_B);
+ if (dfsm & SKL_DFSM_PIPE_C_DISABLE)
+ disabled_mask |= BIT(PIPE_C);
+
+ num_bits = hweight8(disabled_mask);
+
+ switch (disabled_mask) {
+ case BIT(PIPE_A):
+ case BIT(PIPE_B):
+ case BIT(PIPE_A) | BIT(PIPE_B):
+ case BIT(PIPE_A) | BIT(PIPE_C):
+ invalid = true;
+ break;
+ default:
+ invalid = false;
+ }
+
+ if (num_bits > info->num_pipes || invalid)
+ DRM_ERROR("invalid pipe fuse configuration: 0x%x\n",
+ disabled_mask);
+ else
+ info->num_pipes -= num_bits;
}
/* Initialize slice/subslice/EU info */
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 556a458..c6e6a24 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5991,6 +5991,9 @@ enum skl_disp_power_wells {
#define SKL_DFSM_CDCLK_LIMIT_540 (1 << 23)
#define SKL_DFSM_CDCLK_LIMIT_450 (2 << 23)
#define SKL_DFSM_CDCLK_LIMIT_337_5 (3 << 23)
+#define SKL_DFSM_PIPE_A_DISABLE (1 << 30)
+#define SKL_DFSM_PIPE_B_DISABLE (1 << 21)
+#define SKL_DFSM_PIPE_C_DISABLE (1 << 28)
#define FF_SLICE_CS_CHICKEN2 _MMIO(0x20e4)
#define GEN9_TSG_BARRIER_ACK_DISABLE (1<<8)
--
2.5.0
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^ permalink raw reply related [flat|nested] 4+ messages in thread* ✓ Fi.CI.BAT: success for drm/i915/skl/kbl: Add support for pipe fusing (rev3)
2016-01-20 14:31 [PATCH v3] drm/i915/skl/kbl: Add support for pipe fusing Patrik Jakobsson
@ 2016-01-21 13:20 ` Patchwork
2016-01-28 11:33 ` [PATCH v3] drm/i915/skl/kbl: Add support for pipe fusing Damien Lespiau
1 sibling, 0 replies; 4+ messages in thread
From: Patchwork @ 2016-01-21 13:20 UTC (permalink / raw)
To: Patrik Jakobsson; +Cc: intel-gfx
== Summary ==
Built on 8fe9e785ae04fa7c37f7935cff12d62e38054b60 drm-intel-nightly: 2016y-01m-21d-11h-02m-42s UTC integration manifest
bdw-nuci7 total:140 pass:131 dwarn:0 dfail:0 fail:0 skip:9
bdw-ultra total:143 pass:137 dwarn:0 dfail:0 fail:0 skip:6
bsw-nuc-2 total:143 pass:119 dwarn:0 dfail:0 fail:0 skip:24
hsw-brixbox total:143 pass:136 dwarn:0 dfail:0 fail:0 skip:7
hsw-gt2 total:143 pass:139 dwarn:0 dfail:0 fail:0 skip:4
ilk-hp8440p total:143 pass:104 dwarn:1 dfail:0 fail:0 skip:38
ivb-t430s total:143 pass:137 dwarn:0 dfail:0 fail:0 skip:6
skl-i5k-2 total:143 pass:134 dwarn:1 dfail:0 fail:0 skip:8
skl-i7k-2 total:143 pass:134 dwarn:1 dfail:0 fail:0 skip:8
snb-dellxps total:143 pass:129 dwarn:0 dfail:0 fail:0 skip:14
snb-x220t total:143 pass:129 dwarn:0 dfail:0 fail:1 skip:13
Results at /archive/results/CI_IGT_test/Patchwork_1234/
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v3] drm/i915/skl/kbl: Add support for pipe fusing
2016-01-20 14:31 [PATCH v3] drm/i915/skl/kbl: Add support for pipe fusing Patrik Jakobsson
2016-01-21 13:20 ` ✓ Fi.CI.BAT: success for drm/i915/skl/kbl: Add support for pipe fusing (rev3) Patchwork
@ 2016-01-28 11:33 ` Damien Lespiau
2016-02-02 15:08 ` Jani Nikula
1 sibling, 1 reply; 4+ messages in thread
From: Damien Lespiau @ 2016-01-28 11:33 UTC (permalink / raw)
To: Patrik Jakobsson; +Cc: intel-gfx
On Wed, Jan 20, 2016 at 03:31:20PM +0100, Patrik Jakobsson wrote:
> On SKL and KBL we can have pipe A/B/C disabled by fuse settings. The
> pipes must be fused in descending order (e.g. C, B+C, A+B+C). We simply
> decrease info->num_pipes if we find a valid fused out config.
>
> v2: Don't store the pipe disabled mask in device info (Damien)
>
> v3: Don't check FUSE_STRAP register for pipe c disabled
>
> Cc: Damien Lespiau <damien.lespiau@intel.com>
> Signed-off-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
(listing the valid cases would have made things simpler?)
--
Damien
> ---
> drivers/gpu/drm/i915/i915_dma.c | 31 +++++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> 2 files changed, 34 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index 44a896c..daaa67f 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -814,6 +814,37 @@ static void intel_device_info_runtime_init(struct drm_device *dev)
> DRM_INFO("Display fused off, disabling\n");
> info->num_pipes = 0;
> }
> + } else if (info->num_pipes > 0 && INTEL_INFO(dev)->gen == 9) {
> + u32 dfsm = I915_READ(SKL_DFSM);
> + u8 disabled_mask = 0;
> + bool invalid;
> + int num_bits;
> +
> + if (dfsm & SKL_DFSM_PIPE_A_DISABLE)
> + disabled_mask |= BIT(PIPE_A);
> + if (dfsm & SKL_DFSM_PIPE_B_DISABLE)
> + disabled_mask |= BIT(PIPE_B);
> + if (dfsm & SKL_DFSM_PIPE_C_DISABLE)
> + disabled_mask |= BIT(PIPE_C);
> +
> + num_bits = hweight8(disabled_mask);
> +
> + switch (disabled_mask) {
> + case BIT(PIPE_A):
> + case BIT(PIPE_B):
> + case BIT(PIPE_A) | BIT(PIPE_B):
> + case BIT(PIPE_A) | BIT(PIPE_C):
> + invalid = true;
> + break;
> + default:
> + invalid = false;
> + }
> +
> + if (num_bits > info->num_pipes || invalid)
> + DRM_ERROR("invalid pipe fuse configuration: 0x%x\n",
> + disabled_mask);
> + else
> + info->num_pipes -= num_bits;
> }
>
> /* Initialize slice/subslice/EU info */
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 556a458..c6e6a24 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5991,6 +5991,9 @@ enum skl_disp_power_wells {
> #define SKL_DFSM_CDCLK_LIMIT_540 (1 << 23)
> #define SKL_DFSM_CDCLK_LIMIT_450 (2 << 23)
> #define SKL_DFSM_CDCLK_LIMIT_337_5 (3 << 23)
> +#define SKL_DFSM_PIPE_A_DISABLE (1 << 30)
> +#define SKL_DFSM_PIPE_B_DISABLE (1 << 21)
> +#define SKL_DFSM_PIPE_C_DISABLE (1 << 28)
>
> #define FF_SLICE_CS_CHICKEN2 _MMIO(0x20e4)
> #define GEN9_TSG_BARRIER_ACK_DISABLE (1<<8)
> --
> 2.5.0
>
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^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH v3] drm/i915/skl/kbl: Add support for pipe fusing
2016-01-28 11:33 ` [PATCH v3] drm/i915/skl/kbl: Add support for pipe fusing Damien Lespiau
@ 2016-02-02 15:08 ` Jani Nikula
0 siblings, 0 replies; 4+ messages in thread
From: Jani Nikula @ 2016-02-02 15:08 UTC (permalink / raw)
To: Damien Lespiau, Patrik Jakobsson; +Cc: intel-gfx
On Thu, 28 Jan 2016, Damien Lespiau <damien.lespiau@intel.com> wrote:
> On Wed, Jan 20, 2016 at 03:31:20PM +0100, Patrik Jakobsson wrote:
>> On SKL and KBL we can have pipe A/B/C disabled by fuse settings. The
>> pipes must be fused in descending order (e.g. C, B+C, A+B+C). We simply
>> decrease info->num_pipes if we find a valid fused out config.
>>
>> v2: Don't store the pipe disabled mask in device info (Damien)
>>
>> v3: Don't check FUSE_STRAP register for pipe c disabled
>>
>> Cc: Damien Lespiau <damien.lespiau@intel.com>
>> Signed-off-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
>
> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Pushed to drm-intel-next-queued, thanks for the patch and review.
BR,
Jani.
>
> (listing the valid cases would have made things simpler?)
--
Jani Nikula, Intel Open Source Technology Center
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^ permalink raw reply [flat|nested] 4+ messages in thread
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2016-01-20 14:31 [PATCH v3] drm/i915/skl/kbl: Add support for pipe fusing Patrik Jakobsson
2016-01-21 13:20 ` ✓ Fi.CI.BAT: success for drm/i915/skl/kbl: Add support for pipe fusing (rev3) Patchwork
2016-01-28 11:33 ` [PATCH v3] drm/i915/skl/kbl: Add support for pipe fusing Damien Lespiau
2016-02-02 15:08 ` Jani Nikula
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