* [PATCH 1/2] drm/i915: Update VBT fields for child devices
@ 2016-02-12 13:09 Shubhangi Shrivastava
2016-02-12 13:09 ` [PATCH 2/2] drm/i915: Set invert bit for hpd based on VBT Shubhangi Shrivastava
` (2 more replies)
0 siblings, 3 replies; 12+ messages in thread
From: Shubhangi Shrivastava @ 2016-02-12 13:09 UTC (permalink / raw)
To: intel-gfx; +Cc: Shubhangi Shrivastava
This patch adds new fields that are not yet added in drm code
in child devices struct
Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Durgadoss R <durgadoss.r@intel.com>
Signed-off-by: Shubhangi Shrivastava <shubhangi.shrivastava@intel.com>
---
drivers/gpu/drm/i915/intel_bios.c | 15 ++++++++++++++-
drivers/gpu/drm/i915/intel_bios.h | 20 +++++++++++++-------
2 files changed, 27 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index bf62a19..a26d4b4 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1124,7 +1124,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
}
/* Parse the I_boost config for SKL and above */
- if (bdb->version >= 196 && (child->common.flags_1 & IBOOST_ENABLE)) {
+ if (bdb->version >= 196 && child->common.iboost) {
info->dp_boost_level = translate_iboost(child->common.iboost_level & 0xF);
DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
port_name(port), info->dp_boost_level);
@@ -1250,6 +1250,19 @@ parse_device_mapping(struct drm_i915_private *dev_priv,
*/
memcpy(child_dev_ptr, p_child,
min_t(size_t, p_defs->child_dev_size, sizeof(*p_child)));
+
+ /*
+ * copied full block, now init values when they are not
+ * available in current version
+ */
+ if (bdb->version < 196) {
+ /* Set default values for bits added from v196 */
+ child_dev_ptr->common.iboost = 0;
+ child_dev_ptr->common.hpd_invert = 0;
+ }
+
+ if (bdb->version < 192)
+ child_dev_ptr->common.lspcon = 0;
}
return;
}
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index 350d4e0..833b82b 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -250,9 +250,6 @@ struct old_child_dev_config {
* versions. Notice that the meaning of the contents contents may still change,
* but at least the offsets are consistent. */
-/* Definitions for flags_1 */
-#define IBOOST_ENABLE (1<<3)
-
struct common_child_dev_config {
u16 handle;
u16 device_type;
@@ -261,10 +258,19 @@ struct common_child_dev_config {
u8 not_common2[2];
u8 ddc_pin;
u16 edid_ptr;
- u8 obsolete;
- u8 flags_1;
- u8 not_common3[13];
- u8 iboost_level;
+ u8 dvo_cfg; /* See DEVICE_CFG_* above */
+ u8 efp_routed:1;
+ u8 lane_reversal:1;
+ u8 lspcon:1;
+ u8 iboost:1;
+ u8 hpd_invert:1;
+ u8 flag_reserved:3;
+ u8 hdmi_support:1;
+ u8 dp_support:1;
+ u8 tmds_support:1;
+ u8 support_reserved:5;
+ u8 not_common3[13];
+ u8 iboost_level;
} __packed;
--
2.6.1
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^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/2] drm/i915: Set invert bit for hpd based on VBT
2016-02-12 13:09 [PATCH 1/2] drm/i915: Update VBT fields for child devices Shubhangi Shrivastava
@ 2016-02-12 13:09 ` Shubhangi Shrivastava
2016-02-12 13:37 ` kbuild test robot
2016-02-12 14:08 ` Ville Syrjälä
2016-02-16 8:52 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Update VBT fields for child devices Patchwork
2016-02-16 12:23 ` [PATCH 1/2] " Jani Nikula
2 siblings, 2 replies; 12+ messages in thread
From: Shubhangi Shrivastava @ 2016-02-12 13:09 UTC (permalink / raw)
To: intel-gfx; +Cc: Shubhangi Shrivastava
This patch sets the invert bit for hpd detection for each port
based on VBT configuration. Since each AOB can be designed to
depend on invert bit or not, it is expected if an AOB requires
invert bit, the user will set respective bit in VBT.
v2: Separated VBT parsing from the rest of the logic. (Jani)
Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Durgadoss R <durgadoss.r@intel.com>
Signed-off-by: Shubhangi Shrivastava <shubhangi.shrivastava@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_irq.c | 43 +++++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/i915_reg.h | 9 ++++++++
drivers/gpu/drm/i915/intel_bios.c | 42 ++++++++++++++++++++++++++++++++++++++
4 files changed, 95 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8216665..457f175 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3393,6 +3393,7 @@ extern void intel_i2c_reset(struct drm_device *dev);
/* intel_bios.c */
int intel_bios_init(struct drm_i915_private *dev_priv);
bool intel_bios_is_valid_vbt(const void *buf, size_t size);
+bool intel_bios_is_port_hpd_inverted(struct drm_device *dev, enum port port);
/* intel_opregion.c */
#ifdef CONFIG_ACPI
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 25a8937..fb95fb0 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -36,6 +36,7 @@
#include "i915_drv.h"
#include "i915_trace.h"
#include "intel_drv.h"
+#include "intel_bios.h"
/**
* DOC: interrupt handling
@@ -3424,6 +3425,47 @@ static void ibx_hpd_irq_setup(struct drm_device *dev)
I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
}
+/*
+ * For BXT invert bit has to be set based on AOB design
+ * for HPD detection logic, update it based on VBT fields.
+ */
+static void bxt_hpd_set_invert(struct drm_device *dev, u32 hotplug_port)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ int reg_val, val = 0;
+ enum port port;
+
+ for (port = PORT_A; port <= PORT_C; port++) {
+
+ /* Proceed only if invert bit is set */
+ if (intel_bios_is_port_hpd_inverted(dev, port)) {
+ switch (port) {
+ case PORT_A:
+ if (hotplug_port & BXT_DE_PORT_HP_DDIA)
+ val |= BXT_DDIA_HPD_INVERT;
+ break;
+ case PORT_B:
+ if (hotplug_port & BXT_DE_PORT_HP_DDIB)
+ val |= BXT_DDIB_HPD_INVERT;
+ break;
+ case PORT_C:
+ if (hotplug_port & BXT_DE_PORT_HP_DDIC)
+ val |= BXT_DDIC_HPD_INVERT;
+ break;
+ default:
+ DRM_ERROR("HPD invert set for invalid port %d\n",
+ port);
+ break;
+ }
+ }
+ }
+ reg_val = I915_READ(BXT_HOTPLUG_CTL);
+ DRM_DEBUG_KMS("Invert bit setting: hp_ctl:%x hp_port:%x val:%x\n",
+ reg_val, hotplug_port, val);
+ reg_val &= ~BXT_DDI_HPD_INVERT_MASK;
+ I915_WRITE(BXT_HOTPLUG_CTL, reg_val | val);
+}
+
static void spt_hpd_irq_setup(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
@@ -3494,6 +3536,7 @@ static void bxt_hpd_irq_setup(struct drm_device *dev)
hotplug |= PORTC_HOTPLUG_ENABLE | PORTB_HOTPLUG_ENABLE |
PORTA_HOTPLUG_ENABLE;
I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
+ bxt_hpd_set_invert(dev, enabled_irqs);
}
static void ibx_irq_postinstall(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 6732fc1..66cf92e 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5940,6 +5940,15 @@ enum skl_disp_power_wells {
#define GEN8_PCU_IIR _MMIO(0x444e8)
#define GEN8_PCU_IER _MMIO(0x444ec)
+/* BXT hotplug control */
+#define BXT_HOTPLUG_CTL _MMIO(0xC4030)
+#define BXT_DDIA_HPD_INVERT (1 << 27)
+#define BXT_DDIC_HPD_INVERT (1 << 11)
+#define BXT_DDIB_HPD_INVERT (1 << 3)
+#define BXT_DDI_HPD_INVERT_MASK (BXT_DDIA_HPD_INVERT | \
+ BXT_DDIB_HPD_INVERT | \
+ BXT_DDIC_HPD_INVERT)
+
#define ILK_DISPLAY_CHICKEN2 _MMIO(0x42004)
/* Required on all Ironlake and Sandybridge according to the B-Spec. */
#define ILK_ELPIN_409_SELECT (1 << 25)
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index a26d4b4..24d0077 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -105,6 +105,48 @@ find_section(const void *_bdb, int section_id)
return NULL;
}
+bool
+intel_bios_is_port_hpd_inverted(struct drm_device *dev, enum port port)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ int i;
+
+ if (!IS_BROXTON(dev)) {
+ DRM_ERROR("Bit inversion is not required in this platform\n");
+ return false;
+ }
+
+ for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
+
+ if (dev_priv->vbt.child_dev[i].common.hpd_invert == 1) {
+
+ switch (dev_priv->vbt.child_dev[i].common.dvo_port) {
+ case DVO_PORT_DPA:
+ case DVO_PORT_HDMIA:
+ if (port == PORT_A)
+ return true;
+ break;
+ case DVO_PORT_DPB:
+ case DVO_PORT_HDMIB:
+ if (port == PORT_B)
+ return true;
+ break;
+ case DVO_PORT_DPC:
+ case DVO_PORT_HDMIC:
+ if (port == PORT_C)
+ return true;
+ break;
+ default:
+ DRM_DEBUG_KMS("This dvo port %d doesn't need invert\n",
+ dev_priv->vbt.child_dev[i].common.dvo_port);
+ break;
+ }
+ }
+ }
+
+ return false;
+}
+
static void
fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
const struct lvds_dvo_timing *dvo_timing)
--
2.6.1
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^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 2/2] drm/i915: Set invert bit for hpd based on VBT
2016-02-12 13:09 ` [PATCH 2/2] drm/i915: Set invert bit for hpd based on VBT Shubhangi Shrivastava
@ 2016-02-12 13:37 ` kbuild test robot
2016-02-12 14:08 ` Ville Syrjälä
1 sibling, 0 replies; 12+ messages in thread
From: kbuild test robot @ 2016-02-12 13:37 UTC (permalink / raw)
Cc: intel-gfx, Shubhangi Shrivastava, kbuild-all
[-- Attachment #1: Type: text/plain, Size: 6506 bytes --]
Hi Shubhangi,
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on next-20160212]
[cannot apply to v4.5-rc3]
[if your patch is applied to the wrong git tree, please drop us a note to help improving the system]
url: https://github.com/0day-ci/linux/commits/Shubhangi-Shrivastava/drm-i915-Set-invert-bit-for-hpd-based-on-VBT/20160212-203937
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-x000-201606 (attached as .config)
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All warnings (new ones prefixed by >>):
In file included from include/uapi/linux/stddef.h:1:0,
from include/linux/stddef.h:4,
from include/uapi/linux/posix_types.h:4,
from include/uapi/linux/types.h:13,
from include/linux/types.h:5,
from include/drm/drm_dp_helper.h:26,
from drivers/gpu/drm/i915/intel_bios.c:28:
drivers/gpu/drm/i915/intel_bios.c: In function 'intel_bios_is_port_hpd_inverted':
drivers/gpu/drm/i915/intel_bios.c:121:40: error: 'struct common_child_dev_config' has no member named 'hpd_invert'
if (dev_priv->vbt.child_dev[i].common.hpd_invert == 1) {
^
include/linux/compiler.h:147:28: note: in definition of macro '__trace_if'
if (__builtin_constant_p((cond)) ? !!(cond) : \
^
>> drivers/gpu/drm/i915/intel_bios.c:121:3: note: in expansion of macro 'if'
if (dev_priv->vbt.child_dev[i].common.hpd_invert == 1) {
^
drivers/gpu/drm/i915/intel_bios.c:121:40: error: 'struct common_child_dev_config' has no member named 'hpd_invert'
if (dev_priv->vbt.child_dev[i].common.hpd_invert == 1) {
^
include/linux/compiler.h:147:40: note: in definition of macro '__trace_if'
if (__builtin_constant_p((cond)) ? !!(cond) : \
^
>> drivers/gpu/drm/i915/intel_bios.c:121:3: note: in expansion of macro 'if'
if (dev_priv->vbt.child_dev[i].common.hpd_invert == 1) {
^
drivers/gpu/drm/i915/intel_bios.c:121:40: error: 'struct common_child_dev_config' has no member named 'hpd_invert'
if (dev_priv->vbt.child_dev[i].common.hpd_invert == 1) {
^
include/linux/compiler.h:158:16: note: in definition of macro '__trace_if'
______r = !!(cond); \
^
>> drivers/gpu/drm/i915/intel_bios.c:121:3: note: in expansion of macro 'if'
if (dev_priv->vbt.child_dev[i].common.hpd_invert == 1) {
^
vim +/if +121 drivers/gpu/drm/i915/intel_bios.c
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
> 28 #include <drm/drm_dp_helper.h>
29 #include <drm/drmP.h>
30 #include <drm/i915_drm.h>
31 #include "i915_drv.h"
32 #include "intel_bios.h"
33
34 /**
35 * DOC: Video BIOS Table (VBT)
36 *
37 * The Video BIOS Table, or VBT, provides platform and board specific
38 * configuration information to the driver that is not discoverable or available
39 * through other means. The configuration is mostly related to display
40 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
41 * the PCI ROM.
42 *
43 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
44 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
45 * contain the actual configuration information. The VBT Header, and thus the
46 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
47 * BDB Header. The data blocks are concatenated after the BDB Header. The data
48 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
49 * data. (Block 53, the MIPI Sequence Block is an exception.)
50 *
51 * The driver parses the VBT during load. The relevant information is stored in
52 * driver private data for ease of use, and the actual VBT is not read after
53 * that.
54 */
55
56 #define SLAVE_ADDR1 0x70
57 #define SLAVE_ADDR2 0x72
58
59 static int panel_type;
60
61 /* Get BDB block size given a pointer to Block ID. */
62 static u32 _get_blocksize(const u8 *block_base)
63 {
64 /* The MIPI Sequence Block v3+ has a separate size field. */
65 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
66 return *((const u32 *)(block_base + 4));
67 else
68 return *((const u16 *)(block_base + 1));
69 }
70
71 /* Get BDB block size give a pointer to data after Block ID and Block Size. */
72 static u32 get_blocksize(const void *block_data)
73 {
74 return _get_blocksize(block_data - 3);
75 }
76
77 static const void *
78 find_section(const void *_bdb, int section_id)
79 {
80 const struct bdb_header *bdb = _bdb;
81 const u8 *base = _bdb;
82 int index = 0;
83 u32 total, current_size;
84 u8 current_id;
85
86 /* skip to first section */
87 index += bdb->header_size;
88 total = bdb->bdb_size;
89
90 /* walk the sections looking for section_id */
91 while (index + 3 < total) {
92 current_id = *(base + index);
93 current_size = _get_blocksize(base + index);
94 index += 3;
95
96 if (index + current_size > total)
97 return NULL;
98
99 if (current_id == section_id)
100 return base + index;
101
102 index += current_size;
103 }
104
105 return NULL;
106 }
107
108 bool
109 intel_bios_is_port_hpd_inverted(struct drm_device *dev, enum port port)
110 {
111 struct drm_i915_private *dev_priv = dev->dev_private;
112 int i;
113
114 if (!IS_BROXTON(dev)) {
115 DRM_ERROR("Bit inversion is not required in this platform\n");
116 return false;
117 }
118
119 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
120
> 121 if (dev_priv->vbt.child_dev[i].common.hpd_invert == 1) {
122
123 switch (dev_priv->vbt.child_dev[i].common.dvo_port) {
124 case DVO_PORT_DPA:
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/octet-stream, Size: 24181 bytes --]
[-- Attachment #3: Type: text/plain, Size: 160 bytes --]
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/2] drm/i915: Set invert bit for hpd based on VBT
2016-02-12 13:09 ` [PATCH 2/2] drm/i915: Set invert bit for hpd based on VBT Shubhangi Shrivastava
2016-02-12 13:37 ` kbuild test robot
@ 2016-02-12 14:08 ` Ville Syrjälä
2016-02-16 1:59 ` Thulasimani, Sivakumar
1 sibling, 1 reply; 12+ messages in thread
From: Ville Syrjälä @ 2016-02-12 14:08 UTC (permalink / raw)
To: Shubhangi Shrivastava; +Cc: intel-gfx
On Fri, Feb 12, 2016 at 06:39:44PM +0530, Shubhangi Shrivastava wrote:
> This patch sets the invert bit for hpd detection for each port
> based on VBT configuration. Since each AOB can be designed to
> depend on invert bit or not, it is expected if an AOB requires
> invert bit, the user will set respective bit in VBT.
>
> v2: Separated VBT parsing from the rest of the logic. (Jani)
>
> Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
> Signed-off-by: Durgadoss R <durgadoss.r@intel.com>
> Signed-off-by: Shubhangi Shrivastava <shubhangi.shrivastava@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/i915_irq.c | 43 +++++++++++++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_reg.h | 9 ++++++++
> drivers/gpu/drm/i915/intel_bios.c | 42 ++++++++++++++++++++++++++++++++++++++
> 4 files changed, 95 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 8216665..457f175 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -3393,6 +3393,7 @@ extern void intel_i2c_reset(struct drm_device *dev);
> /* intel_bios.c */
> int intel_bios_init(struct drm_i915_private *dev_priv);
> bool intel_bios_is_valid_vbt(const void *buf, size_t size);
> +bool intel_bios_is_port_hpd_inverted(struct drm_device *dev, enum port port);
>
> /* intel_opregion.c */
> #ifdef CONFIG_ACPI
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 25a8937..fb95fb0 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -36,6 +36,7 @@
> #include "i915_drv.h"
> #include "i915_trace.h"
> #include "intel_drv.h"
> +#include "intel_bios.h"
>
> /**
> * DOC: interrupt handling
> @@ -3424,6 +3425,47 @@ static void ibx_hpd_irq_setup(struct drm_device *dev)
> I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
> }
>
> +/*
> + * For BXT invert bit has to be set based on AOB design
> + * for HPD detection logic, update it based on VBT fields.
> + */
> +static void bxt_hpd_set_invert(struct drm_device *dev, u32 hotplug_port)
> +{
> + struct drm_i915_private *dev_priv = dev->dev_private;
> + int reg_val, val = 0;
> + enum port port;
> +
> + for (port = PORT_A; port <= PORT_C; port++) {
> +
> + /* Proceed only if invert bit is set */
> + if (intel_bios_is_port_hpd_inverted(dev, port)) {
> + switch (port) {
> + case PORT_A:
> + if (hotplug_port & BXT_DE_PORT_HP_DDIA)
> + val |= BXT_DDIA_HPD_INVERT;
> + break;
> + case PORT_B:
> + if (hotplug_port & BXT_DE_PORT_HP_DDIB)
> + val |= BXT_DDIB_HPD_INVERT;
> + break;
> + case PORT_C:
> + if (hotplug_port & BXT_DE_PORT_HP_DDIC)
> + val |= BXT_DDIC_HPD_INVERT;
> + break;
> + default:
> + DRM_ERROR("HPD invert set for invalid port %d\n",
> + port);
> + break;
> + }
> + }
> + }
> + reg_val = I915_READ(BXT_HOTPLUG_CTL);
> + DRM_DEBUG_KMS("Invert bit setting: hp_ctl:%x hp_port:%x val:%x\n",
> + reg_val, hotplug_port, val);
> + reg_val &= ~BXT_DDI_HPD_INVERT_MASK;
> + I915_WRITE(BXT_HOTPLUG_CTL, reg_val | val);
> +}
No RMW stuff please. Just set up the bits appropriately in bxt_hpd_irq_setup().
> +
> static void spt_hpd_irq_setup(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -3494,6 +3536,7 @@ static void bxt_hpd_irq_setup(struct drm_device *dev)
> hotplug |= PORTC_HOTPLUG_ENABLE | PORTB_HOTPLUG_ENABLE |
> PORTA_HOTPLUG_ENABLE;
> I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
> + bxt_hpd_set_invert(dev, enabled_irqs);
> }
>
> static void ibx_irq_postinstall(struct drm_device *dev)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 6732fc1..66cf92e 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5940,6 +5940,15 @@ enum skl_disp_power_wells {
> #define GEN8_PCU_IIR _MMIO(0x444e8)
> #define GEN8_PCU_IER _MMIO(0x444ec)
>
> +/* BXT hotplug control */
> +#define BXT_HOTPLUG_CTL _MMIO(0xC4030)
We already have a name for that register.
> +#define BXT_DDIA_HPD_INVERT (1 << 27)
> +#define BXT_DDIC_HPD_INVERT (1 << 11)
> +#define BXT_DDIB_HPD_INVERT (1 << 3)
I was going to suggest parametrizing this stuff, but the bits are in a
fairly nasty order so not so easy, and we haven't parametrized the rest
if the hpd bits either, so doing it just for these would be a bit out of
place perhaps.
We should perhaps try to parametrize all the hpd bits though, since that
could result in some neater looking code. But that sort of stuff is
better left for a separate patch. After a bit more though it's not
actually hard at all: (((port) * 8 + 24 + whatever) & 31)
> +#define BXT_DDI_HPD_INVERT_MASK (BXT_DDIA_HPD_INVERT | \
> + BXT_DDIB_HPD_INVERT | \
> + BXT_DDIC_HPD_INVERT)
> +
> #define ILK_DISPLAY_CHICKEN2 _MMIO(0x42004)
> /* Required on all Ironlake and Sandybridge according to the B-Spec. */
> #define ILK_ELPIN_409_SELECT (1 << 25)
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index a26d4b4..24d0077 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -105,6 +105,48 @@ find_section(const void *_bdb, int section_id)
> return NULL;
> }
>
> +bool
> +intel_bios_is_port_hpd_inverted(struct drm_device *dev, enum port port)
> +{
> + struct drm_i915_private *dev_priv = dev->dev_private;
> + int i;
> +
> + if (!IS_BROXTON(dev)) {
> + DRM_ERROR("Bit inversion is not required in this platform\n");
> + return false;
> + }
> +
> + for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
> +
> + if (dev_priv->vbt.child_dev[i].common.hpd_invert == 1) {
> +
> + switch (dev_priv->vbt.child_dev[i].common.dvo_port) {
> + case DVO_PORT_DPA:
> + case DVO_PORT_HDMIA:
> + if (port == PORT_A)
> + return true;
> + break;
> + case DVO_PORT_DPB:
> + case DVO_PORT_HDMIB:
> + if (port == PORT_B)
> + return true;
> + break;
> + case DVO_PORT_DPC:
> + case DVO_PORT_HDMIC:
> + if (port == PORT_C)
> + return true;
> + break;
> + default:
> + DRM_DEBUG_KMS("This dvo port %d doesn't need invert\n",
> + dev_priv->vbt.child_dev[i].common.dvo_port);
Why do we need a debug message for the "no invert" case if we don't
need one for the invert case?
The code structure feels a bit wonky. It's sort of expecting multiple
child devs for each port. Can that actually happen?
> + break;
> + }
> + }
> + }
> +
> + return false;
> +}
> +
> static void
> fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
> const struct lvds_dvo_timing *dvo_timing)
> --
> 2.6.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/2] drm/i915: Set invert bit for hpd based on VBT
2016-02-12 14:08 ` Ville Syrjälä
@ 2016-02-16 1:59 ` Thulasimani, Sivakumar
2016-02-16 9:41 ` Ville Syrjälä
0 siblings, 1 reply; 12+ messages in thread
From: Thulasimani, Sivakumar @ 2016-02-16 1:59 UTC (permalink / raw)
To: Ville Syrjälä, Shubhangi Shrivastava; +Cc: intel-gfx
On 2/12/2016 7:38 PM, Ville Syrjälä wrote:
> On Fri, Feb 12, 2016 at 06:39:44PM +0530, Shubhangi Shrivastava wrote:
>> This patch sets the invert bit for hpd detection for each port
>> based on VBT configuration. Since each AOB can be designed to
>> depend on invert bit or not, it is expected if an AOB requires
>> invert bit, the user will set respective bit in VBT.
>>
>> v2: Separated VBT parsing from the rest of the logic. (Jani)
>>
>> Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
>> Signed-off-by: Durgadoss R <durgadoss.r@intel.com>
>> Signed-off-by: Shubhangi Shrivastava <shubhangi.shrivastava@intel.com>
>> ---
>> drivers/gpu/drm/i915/i915_drv.h | 1 +
>> drivers/gpu/drm/i915/i915_irq.c | 43 +++++++++++++++++++++++++++++++++++++++
>> drivers/gpu/drm/i915/i915_reg.h | 9 ++++++++
>> drivers/gpu/drm/i915/intel_bios.c | 42 ++++++++++++++++++++++++++++++++++++++
>> 4 files changed, 95 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index 8216665..457f175 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -3393,6 +3393,7 @@ extern void intel_i2c_reset(struct drm_device *dev);
>> /* intel_bios.c */
>> int intel_bios_init(struct drm_i915_private *dev_priv);
>> bool intel_bios_is_valid_vbt(const void *buf, size_t size);
>> +bool intel_bios_is_port_hpd_inverted(struct drm_device *dev, enum port port);
>>
>> /* intel_opregion.c */
>> #ifdef CONFIG_ACPI
>> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>> index 25a8937..fb95fb0 100644
>> --- a/drivers/gpu/drm/i915/i915_irq.c
>> +++ b/drivers/gpu/drm/i915/i915_irq.c
>> @@ -36,6 +36,7 @@
>> #include "i915_drv.h"
>> #include "i915_trace.h"
>> #include "intel_drv.h"
>> +#include "intel_bios.h"
>>
>> /**
>> * DOC: interrupt handling
>> @@ -3424,6 +3425,47 @@ static void ibx_hpd_irq_setup(struct drm_device *dev)
>> I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
>> }
>>
>> +/*
>> + * For BXT invert bit has to be set based on AOB design
>> + * for HPD detection logic, update it based on VBT fields.
>> + */
>> +static void bxt_hpd_set_invert(struct drm_device *dev, u32 hotplug_port)
>> +{
>> + struct drm_i915_private *dev_priv = dev->dev_private;
>> + int reg_val, val = 0;
>> + enum port port;
>> +
>> + for (port = PORT_A; port <= PORT_C; port++) {
>> +
>> + /* Proceed only if invert bit is set */
>> + if (intel_bios_is_port_hpd_inverted(dev, port)) {
>> + switch (port) {
>> + case PORT_A:
>> + if (hotplug_port & BXT_DE_PORT_HP_DDIA)
>> + val |= BXT_DDIA_HPD_INVERT;
>> + break;
>> + case PORT_B:
>> + if (hotplug_port & BXT_DE_PORT_HP_DDIB)
>> + val |= BXT_DDIB_HPD_INVERT;
>> + break;
>> + case PORT_C:
>> + if (hotplug_port & BXT_DE_PORT_HP_DDIC)
>> + val |= BXT_DDIC_HPD_INVERT;
>> + break;
>> + default:
>> + DRM_ERROR("HPD invert set for invalid port %d\n",
>> + port);
>> + break;
>> + }
>> + }
>> + }
>> + reg_val = I915_READ(BXT_HOTPLUG_CTL);
>> + DRM_DEBUG_KMS("Invert bit setting: hp_ctl:%x hp_port:%x val:%x\n",
>> + reg_val, hotplug_port, val);
>> + reg_val &= ~BXT_DDI_HPD_INVERT_MASK;
>> + I915_WRITE(BXT_HOTPLUG_CTL, reg_val | val);
>> +}
> No RMW stuff please. Just set up the bits appropriately in bxt_hpd_irq_setup().
the problem is we need to query vbt for setting invert bit. so not sure
having this logic
inside bxt_hpd_irq_setup is good. if we want to avoid read/write to
registers we can
modify the input to be values written on register instead of
enabled_irqs. that way
we can write the value to register post call to this function and we
need not
worry about current values in register. is that fine ?
>
>> +
>> static void spt_hpd_irq_setup(struct drm_device *dev)
>> {
>> struct drm_i915_private *dev_priv = dev->dev_private;
>> @@ -3494,6 +3536,7 @@ static void bxt_hpd_irq_setup(struct drm_device *dev)
>> hotplug |= PORTC_HOTPLUG_ENABLE | PORTB_HOTPLUG_ENABLE |
>> PORTA_HOTPLUG_ENABLE;
>> I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
>> + bxt_hpd_set_invert(dev, enabled_irqs);
>> }
>>
>> static void ibx_irq_postinstall(struct drm_device *dev)
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>> index 6732fc1..66cf92e 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -5940,6 +5940,15 @@ enum skl_disp_power_wells {
>> #define GEN8_PCU_IIR _MMIO(0x444e8)
>> #define GEN8_PCU_IER _MMIO(0x444ec)
>>
>> +/* BXT hotplug control */
>> +#define BXT_HOTPLUG_CTL _MMIO(0xC4030)
> We already have a name for that register.
yes, but as mentioned by you below the register bits are different.
we did not want to confuse by using an old register define when the
bits are different.
>> +#define BXT_DDIA_HPD_INVERT (1 << 27)
>> +#define BXT_DDIC_HPD_INVERT (1 << 11)
>> +#define BXT_DDIB_HPD_INVERT (1 << 3)
> I was going to suggest parametrizing this stuff, but the bits are in a
> fairly nasty order so not so easy, and we haven't parametrized the rest
> if the hpd bits either, so doing it just for these would be a bit out of
> place perhaps.
>
> We should perhaps try to parametrize all the hpd bits though, since that
> could result in some neater looking code. But that sort of stuff is
> better left for a separate patch. After a bit more though it's not
> actually hard at all: (((port) * 8 + 24 + whatever) & 31)
hmmm will check and get back on if this can be done.
>> +#define BXT_DDI_HPD_INVERT_MASK (BXT_DDIA_HPD_INVERT | \
>> + BXT_DDIB_HPD_INVERT | \
>> + BXT_DDIC_HPD_INVERT)
>> +
>> #define ILK_DISPLAY_CHICKEN2 _MMIO(0x42004)
>> /* Required on all Ironlake and Sandybridge according to the B-Spec. */
>> #define ILK_ELPIN_409_SELECT (1 << 25)
>> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
>> index a26d4b4..24d0077 100644
>> --- a/drivers/gpu/drm/i915/intel_bios.c
>> +++ b/drivers/gpu/drm/i915/intel_bios.c
>> @@ -105,6 +105,48 @@ find_section(const void *_bdb, int section_id)
>> return NULL;
>> }
>>
>> +bool
>> +intel_bios_is_port_hpd_inverted(struct drm_device *dev, enum port port)
>> +{
>> + struct drm_i915_private *dev_priv = dev->dev_private;
>> + int i;
>> +
>> + if (!IS_BROXTON(dev)) {
>> + DRM_ERROR("Bit inversion is not required in this platform\n");
>> + return false;
>> + }
>> +
>> + for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
>> +
>> + if (dev_priv->vbt.child_dev[i].common.hpd_invert == 1) {
>> +
>> + switch (dev_priv->vbt.child_dev[i].common.dvo_port) {
>> + case DVO_PORT_DPA:
>> + case DVO_PORT_HDMIA:
>> + if (port == PORT_A)
>> + return true;
>> + break;
>> + case DVO_PORT_DPB:
>> + case DVO_PORT_HDMIB:
>> + if (port == PORT_B)
>> + return true;
>> + break;
>> + case DVO_PORT_DPC:
>> + case DVO_PORT_HDMIC:
>> + if (port == PORT_C)
>> + return true;
>> + break;
>> + default:
>> + DRM_DEBUG_KMS("This dvo port %d doesn't need invert\n",
>> + dev_priv->vbt.child_dev[i].common.dvo_port);
> Why do we need a debug message for the "no invert" case if we don't
> need one for the invert case?
>
> The code structure feels a bit wonky. It's sort of expecting multiple
> child devs for each port. Can that actually happen?
the debug message is just a fail safe to let know if VBT programming is
incorrect.
it can be removed. but we already found and fixed a incorrect programming in
default VBT with this so i would recommend keeping it :).
regarding child devs, the invert bit can be set for HDMI or DP based on
the board
design so we need to handle this for both port types. hence we are
checking for
both here. i too felt it odd having to loop twice once here and again in
bxt_hpd_set_invert.
if we can come up with a simpler design then i would favor it as well
but for now
this seems to be required.
regards,
Sivakumar
>
>> + break;
>> + }
>> + }
>> + }
>> +
>> + return false;
>> +}
>> +
>> static void
>> fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
>> const struct lvds_dvo_timing *dvo_timing)
>> --
>> 2.6.1
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Update VBT fields for child devices
2016-02-12 13:09 [PATCH 1/2] drm/i915: Update VBT fields for child devices Shubhangi Shrivastava
2016-02-12 13:09 ` [PATCH 2/2] drm/i915: Set invert bit for hpd based on VBT Shubhangi Shrivastava
@ 2016-02-16 8:52 ` Patchwork
2016-02-16 12:23 ` [PATCH 1/2] " Jani Nikula
2 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2016-02-16 8:52 UTC (permalink / raw)
To: Shubhangi Shrivastava; +Cc: intel-gfx
== Summary ==
Series 3344v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/3344/revisions/1/mbox/
Test gem_storedw_loop:
Subgroup basic-default:
pass -> DMESG-WARN (hsw-brixbox)
Test gem_sync:
Subgroup basic-vebox:
dmesg-fail -> PASS (hsw-brixbox)
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-c:
skip -> INCOMPLETE (ilk-hp8440p)
dmesg-warn -> PASS (ivb-t430s)
Test pm_rpm:
Subgroup basic-pci-d3-state:
dmesg-warn -> PASS (bsw-nuc-2)
bdw-nuci7 total:162 pass:152 dwarn:0 dfail:0 fail:0 skip:10
bdw-ultra total:165 pass:152 dwarn:0 dfail:0 fail:0 skip:13
bsw-nuc-2 total:165 pass:136 dwarn:0 dfail:0 fail:0 skip:29
byt-nuc total:165 pass:141 dwarn:0 dfail:0 fail:0 skip:24
hsw-brixbox total:165 pass:150 dwarn:1 dfail:0 fail:0 skip:14
hsw-gt2 total:165 pass:154 dwarn:0 dfail:0 fail:1 skip:10
ilk-hp8440p total:108 pass:77 dwarn:0 dfail:1 fail:1 skip:28
ivb-t430s total:165 pass:150 dwarn:0 dfail:0 fail:1 skip:14
skl-i5k-2 total:165 pass:150 dwarn:0 dfail:0 fail:0 skip:15
snb-dellxps total:165 pass:142 dwarn:0 dfail:0 fail:1 skip:22
snb-x220t total:165 pass:142 dwarn:0 dfail:0 fail:2 skip:21
Results at /archive/results/CI_IGT_test/Patchwork_1401/
a4474d338aa8156348cebe58a329a18c8560da1e drm-intel-nightly: 2016y-02m-15d-17h-27m-11s UTC integration manifest
d332ce088f81282684702a96f1baba93bb204238 drm/i915: Set invert bit for hpd based on VBT
262e395719d8d408254abfc6564782950a4ff8e6 drm/i915: Update VBT fields for child devices
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/2] drm/i915: Set invert bit for hpd based on VBT
2016-02-16 1:59 ` Thulasimani, Sivakumar
@ 2016-02-16 9:41 ` Ville Syrjälä
0 siblings, 0 replies; 12+ messages in thread
From: Ville Syrjälä @ 2016-02-16 9:41 UTC (permalink / raw)
To: Thulasimani, Sivakumar; +Cc: intel-gfx, Shubhangi Shrivastava
On Tue, Feb 16, 2016 at 07:29:03AM +0530, Thulasimani, Sivakumar wrote:
>
>
> On 2/12/2016 7:38 PM, Ville Syrjälä wrote:
> > On Fri, Feb 12, 2016 at 06:39:44PM +0530, Shubhangi Shrivastava wrote:
> >> This patch sets the invert bit for hpd detection for each port
> >> based on VBT configuration. Since each AOB can be designed to
> >> depend on invert bit or not, it is expected if an AOB requires
> >> invert bit, the user will set respective bit in VBT.
> >>
> >> v2: Separated VBT parsing from the rest of the logic. (Jani)
> >>
> >> Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
> >> Signed-off-by: Durgadoss R <durgadoss.r@intel.com>
> >> Signed-off-by: Shubhangi Shrivastava <shubhangi.shrivastava@intel.com>
> >> ---
> >> drivers/gpu/drm/i915/i915_drv.h | 1 +
> >> drivers/gpu/drm/i915/i915_irq.c | 43 +++++++++++++++++++++++++++++++++++++++
> >> drivers/gpu/drm/i915/i915_reg.h | 9 ++++++++
> >> drivers/gpu/drm/i915/intel_bios.c | 42 ++++++++++++++++++++++++++++++++++++++
> >> 4 files changed, 95 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> >> index 8216665..457f175 100644
> >> --- a/drivers/gpu/drm/i915/i915_drv.h
> >> +++ b/drivers/gpu/drm/i915/i915_drv.h
> >> @@ -3393,6 +3393,7 @@ extern void intel_i2c_reset(struct drm_device *dev);
> >> /* intel_bios.c */
> >> int intel_bios_init(struct drm_i915_private *dev_priv);
> >> bool intel_bios_is_valid_vbt(const void *buf, size_t size);
> >> +bool intel_bios_is_port_hpd_inverted(struct drm_device *dev, enum port port);
> >>
> >> /* intel_opregion.c */
> >> #ifdef CONFIG_ACPI
> >> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> >> index 25a8937..fb95fb0 100644
> >> --- a/drivers/gpu/drm/i915/i915_irq.c
> >> +++ b/drivers/gpu/drm/i915/i915_irq.c
> >> @@ -36,6 +36,7 @@
> >> #include "i915_drv.h"
> >> #include "i915_trace.h"
> >> #include "intel_drv.h"
> >> +#include "intel_bios.h"
> >>
> >> /**
> >> * DOC: interrupt handling
> >> @@ -3424,6 +3425,47 @@ static void ibx_hpd_irq_setup(struct drm_device *dev)
> >> I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
> >> }
> >>
> >> +/*
> >> + * For BXT invert bit has to be set based on AOB design
> >> + * for HPD detection logic, update it based on VBT fields.
> >> + */
> >> +static void bxt_hpd_set_invert(struct drm_device *dev, u32 hotplug_port)
> >> +{
> >> + struct drm_i915_private *dev_priv = dev->dev_private;
> >> + int reg_val, val = 0;
> >> + enum port port;
> >> +
> >> + for (port = PORT_A; port <= PORT_C; port++) {
> >> +
> >> + /* Proceed only if invert bit is set */
> >> + if (intel_bios_is_port_hpd_inverted(dev, port)) {
> >> + switch (port) {
> >> + case PORT_A:
> >> + if (hotplug_port & BXT_DE_PORT_HP_DDIA)
> >> + val |= BXT_DDIA_HPD_INVERT;
> >> + break;
> >> + case PORT_B:
> >> + if (hotplug_port & BXT_DE_PORT_HP_DDIB)
> >> + val |= BXT_DDIB_HPD_INVERT;
> >> + break;
> >> + case PORT_C:
> >> + if (hotplug_port & BXT_DE_PORT_HP_DDIC)
> >> + val |= BXT_DDIC_HPD_INVERT;
> >> + break;
> >> + default:
> >> + DRM_ERROR("HPD invert set for invalid port %d\n",
> >> + port);
> >> + break;
> >> + }
> >> + }
> >> + }
> >> + reg_val = I915_READ(BXT_HOTPLUG_CTL);
> >> + DRM_DEBUG_KMS("Invert bit setting: hp_ctl:%x hp_port:%x val:%x\n",
> >> + reg_val, hotplug_port, val);
> >> + reg_val &= ~BXT_DDI_HPD_INVERT_MASK;
> >> + I915_WRITE(BXT_HOTPLUG_CTL, reg_val | val);
> >> +}
> > No RMW stuff please. Just set up the bits appropriately in bxt_hpd_irq_setup().
> the problem is we need to query vbt for setting invert bit. so not sure
> having this logic
> inside bxt_hpd_irq_setup is good.
I think it is. We don't want to spread this stuff around all over the
place.
> if we want to avoid read/write to
> registers we can
> modify the input to be values written on register instead of
> enabled_irqs. that way
> we can write the value to register post call to this function and we
> need not
> worry about current values in register. is that fine ?
I don't really see any point in doing it outside bxt_hpd_irq_setup().
> >
> >> +
> >> static void spt_hpd_irq_setup(struct drm_device *dev)
> >> {
> >> struct drm_i915_private *dev_priv = dev->dev_private;
> >> @@ -3494,6 +3536,7 @@ static void bxt_hpd_irq_setup(struct drm_device *dev)
> >> hotplug |= PORTC_HOTPLUG_ENABLE | PORTB_HOTPLUG_ENABLE |
> >> PORTA_HOTPLUG_ENABLE;
> >> I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
> >> + bxt_hpd_set_invert(dev, enabled_irqs);
> >> }
> >>
> >> static void ibx_irq_postinstall(struct drm_device *dev)
> >> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> >> index 6732fc1..66cf92e 100644
> >> --- a/drivers/gpu/drm/i915/i915_reg.h
> >> +++ b/drivers/gpu/drm/i915/i915_reg.h
> >> @@ -5940,6 +5940,15 @@ enum skl_disp_power_wells {
> >> #define GEN8_PCU_IIR _MMIO(0x444e8)
> >> #define GEN8_PCU_IER _MMIO(0x444ec)
> >>
> >> +/* BXT hotplug control */
> >> +#define BXT_HOTPLUG_CTL _MMIO(0xC4030)
> > We already have a name for that register.
> yes, but as mentioned by you below the register bits are different.
> we did not want to confuse by using an old register define when the
> bits are different.
That's not how we roll generally. Besides we're alredy using the other
bits in that register on BXT.
> >> +#define BXT_DDIA_HPD_INVERT (1 << 27)
> >> +#define BXT_DDIC_HPD_INVERT (1 << 11)
> >> +#define BXT_DDIB_HPD_INVERT (1 << 3)
> > I was going to suggest parametrizing this stuff, but the bits are in a
> > fairly nasty order so not so easy, and we haven't parametrized the rest
> > if the hpd bits either, so doing it just for these would be a bit out of
> > place perhaps.
> >
> > We should perhaps try to parametrize all the hpd bits though, since that
> > could result in some neater looking code. But that sort of stuff is
> > better left for a separate patch. After a bit more though it's not
> > actually hard at all: (((port) * 8 + 24 + whatever) & 31)
> hmmm will check and get back on if this can be done.
I tried to do it globally, and while most of it turned out OK, there
were enough exceptions that I don't think it's necessarily worthwile.
It'll just make some of the bits parametrized and some not, so feels
a bit inconsistent.
> >> +#define BXT_DDI_HPD_INVERT_MASK (BXT_DDIA_HPD_INVERT | \
> >> + BXT_DDIB_HPD_INVERT | \
> >> + BXT_DDIC_HPD_INVERT)
> >> +
> >> #define ILK_DISPLAY_CHICKEN2 _MMIO(0x42004)
> >> /* Required on all Ironlake and Sandybridge according to the B-Spec. */
> >> #define ILK_ELPIN_409_SELECT (1 << 25)
> >> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> >> index a26d4b4..24d0077 100644
> >> --- a/drivers/gpu/drm/i915/intel_bios.c
> >> +++ b/drivers/gpu/drm/i915/intel_bios.c
> >> @@ -105,6 +105,48 @@ find_section(const void *_bdb, int section_id)
> >> return NULL;
> >> }
> >>
> >> +bool
> >> +intel_bios_is_port_hpd_inverted(struct drm_device *dev, enum port port)
> >> +{
> >> + struct drm_i915_private *dev_priv = dev->dev_private;
> >> + int i;
> >> +
> >> + if (!IS_BROXTON(dev)) {
> >> + DRM_ERROR("Bit inversion is not required in this platform\n");
> >> + return false;
> >> + }
> >> +
> >> + for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
> >> +
> >> + if (dev_priv->vbt.child_dev[i].common.hpd_invert == 1) {
> >> +
> >> + switch (dev_priv->vbt.child_dev[i].common.dvo_port) {
> >> + case DVO_PORT_DPA:
> >> + case DVO_PORT_HDMIA:
> >> + if (port == PORT_A)
> >> + return true;
> >> + break;
> >> + case DVO_PORT_DPB:
> >> + case DVO_PORT_HDMIB:
> >> + if (port == PORT_B)
> >> + return true;
> >> + break;
> >> + case DVO_PORT_DPC:
> >> + case DVO_PORT_HDMIC:
> >> + if (port == PORT_C)
> >> + return true;
> >> + break;
> >> + default:
> >> + DRM_DEBUG_KMS("This dvo port %d doesn't need invert\n",
> >> + dev_priv->vbt.child_dev[i].common.dvo_port);
> > Why do we need a debug message for the "no invert" case if we don't
> > need one for the invert case?
> >
> > The code structure feels a bit wonky. It's sort of expecting multiple
> > child devs for each port. Can that actually happen?
> the debug message is just a fail safe to let know if VBT programming is
> incorrect.
Well, it'll tell you there's a bogus port in the VBT, but only if it
doesn't have invert==1, but it won't tell you about a bogus port with
invert==0. So seems like a somewhat half hearted attempt at verifying
the VBT to me.
> it can be removed. but we already found and fixed a incorrect programming in
> default VBT with this so i would recommend keeping it :).
>
> regarding child devs, the invert bit can be set for HDMI or DP based on
> the board
> design so we need to handle this for both port types. hence we are
> checking for
> both here. i too felt it odd having to loop twice once here and again in
>
> bxt_hpd_set_invert.
>
> if we can come up with a simpler design then i would favor it as well
> but for now
> this seems to be required.
I tried to think how to do this more neatly and didn't really come up
with anything really elegant.
I suppose one thing we could try is to have this construct a bitmask
so it wouldn't have to loop through the child devs more than once.
And then the register setup could maybe do just something like:
if (invert_hpd & PORT_A)
something |= BXT_DDIA_HPD_INVERT;
if (invert_hpd& PORT_B)
something |= BXT_DDIB_HPD_INVERT;
if (invert_hpd & PORT_C)
something |= BXT_DDIC_HPD_INVERT;
without looping since we don't loop there for the other bits either.
>
> regards,
> Sivakumar
> >
> >> + break;
> >> + }
> >> + }
> >> + }
> >> +
> >> + return false;
> >> +}
> >> +
> >> static void
> >> fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
> >> const struct lvds_dvo_timing *dvo_timing)
> >> --
> >> 2.6.1
> >>
> >> _______________________________________________
> >> Intel-gfx mailing list
> >> Intel-gfx@lists.freedesktop.org
> >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/2] drm/i915: Update VBT fields for child devices
2016-02-12 13:09 [PATCH 1/2] drm/i915: Update VBT fields for child devices Shubhangi Shrivastava
2016-02-12 13:09 ` [PATCH 2/2] drm/i915: Set invert bit for hpd based on VBT Shubhangi Shrivastava
2016-02-16 8:52 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Update VBT fields for child devices Patchwork
@ 2016-02-16 12:23 ` Jani Nikula
2 siblings, 0 replies; 12+ messages in thread
From: Jani Nikula @ 2016-02-16 12:23 UTC (permalink / raw)
To: intel-gfx; +Cc: Shubhangi Shrivastava
On Fri, 12 Feb 2016, Shubhangi Shrivastava <shubhangi.shrivastava@intel.com> wrote:
> This patch adds new fields that are not yet added in drm code
> in child devices struct
>
> Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
> Signed-off-by: Durgadoss R <durgadoss.r@intel.com>
> Signed-off-by: Shubhangi Shrivastava <shubhangi.shrivastava@intel.com>
> ---
> drivers/gpu/drm/i915/intel_bios.c | 15 ++++++++++++++-
> drivers/gpu/drm/i915/intel_bios.h | 20 +++++++++++++-------
> 2 files changed, 27 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index bf62a19..a26d4b4 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -1124,7 +1124,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
> }
>
> /* Parse the I_boost config for SKL and above */
> - if (bdb->version >= 196 && (child->common.flags_1 & IBOOST_ENABLE)) {
> + if (bdb->version >= 196 && child->common.iboost) {
> info->dp_boost_level = translate_iboost(child->common.iboost_level & 0xF);
> DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
> port_name(port), info->dp_boost_level);
> @@ -1250,6 +1250,19 @@ parse_device_mapping(struct drm_i915_private *dev_priv,
> */
> memcpy(child_dev_ptr, p_child,
> min_t(size_t, p_defs->child_dev_size, sizeof(*p_child)));
> +
> + /*
> + * copied full block, now init values when they are not
> + * available in current version
> + */
> + if (bdb->version < 196) {
> + /* Set default values for bits added from v196 */
> + child_dev_ptr->common.iboost = 0;
> + child_dev_ptr->common.hpd_invert = 0;
> + }
> +
> + if (bdb->version < 192)
> + child_dev_ptr->common.lspcon = 0;
> }
> return;
> }
> diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
> index 350d4e0..833b82b 100644
> --- a/drivers/gpu/drm/i915/intel_bios.h
> +++ b/drivers/gpu/drm/i915/intel_bios.h
> @@ -250,9 +250,6 @@ struct old_child_dev_config {
> * versions. Notice that the meaning of the contents contents may still change,
> * but at least the offsets are consistent. */
>
> -/* Definitions for flags_1 */
> -#define IBOOST_ENABLE (1<<3)
> -
> struct common_child_dev_config {
> u16 handle;
> u16 device_type;
> @@ -261,10 +258,19 @@ struct common_child_dev_config {
> u8 not_common2[2];
> u8 ddc_pin;
> u16 edid_ptr;
> - u8 obsolete;
> - u8 flags_1;
> - u8 not_common3[13];
> - u8 iboost_level;
> + u8 dvo_cfg; /* See DEVICE_CFG_* above */
> + u8 efp_routed:1;
> + u8 lane_reversal:1;
> + u8 lspcon:1;
> + u8 iboost:1;
> + u8 hpd_invert:1;
> + u8 flag_reserved:3;
> + u8 hdmi_support:1;
> + u8 dp_support:1;
> + u8 tmds_support:1;
> + u8 support_reserved:5;
> + u8 not_common3[13];
> + u8 iboost_level;
Please use just one space between type and member name, not two.
BR,
Jani.
> } __packed;
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Update VBT fields for child devices
2016-02-25 9:57 Shubhangi Shrivastava
@ 2016-02-25 11:34 ` Patchwork
0 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2016-02-25 11:34 UTC (permalink / raw)
To: Shubhangi Shrivastava; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Update VBT fields for child devices
URL : https://patchwork.freedesktop.org/series/3785/
State : failure
== Summary ==
Series 3785v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/3785/revisions/1/mbox/
Test kms_flip:
Subgroup basic-flip-vs-wf_vblank:
pass -> FAIL (byt-nuc)
Test kms_force_connector_basic:
Subgroup force-connector-state:
pass -> SKIP (ivb-t430s)
Subgroup force-load-detect:
fail -> DMESG-FAIL (snb-dellxps)
fail -> DMESG-FAIL (ilk-hp8440p)
Subgroup prune-stale-modes:
pass -> SKIP (ivb-t430s)
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-c:
pass -> DMESG-WARN (bsw-nuc-2)
bdw-ultra total:168 pass:154 dwarn:0 dfail:0 fail:0 skip:14
bsw-nuc-2 total:168 pass:135 dwarn:2 dfail:0 fail:1 skip:30
byt-nuc total:168 pass:142 dwarn:0 dfail:0 fail:1 skip:25
hsw-brixbox total:168 pass:154 dwarn:0 dfail:0 fail:0 skip:14
hsw-gt2 total:168 pass:157 dwarn:0 dfail:1 fail:0 skip:10
ilk-hp8440p total:168 pass:118 dwarn:0 dfail:1 fail:0 skip:49
ivb-t430s total:168 pass:151 dwarn:0 dfail:0 fail:1 skip:16
skl-i7k-2 total:168 pass:151 dwarn:1 dfail:0 fail:0 skip:16
snb-dellxps total:168 pass:145 dwarn:0 dfail:1 fail:0 skip:22
snb-x220t total:168 pass:145 dwarn:0 dfail:0 fail:2 skip:21
Results at /archive/results/CI_IGT_test/Patchwork_1474/
eb8b161ee8760105238ce372afa47b4565590125 drm-intel-nightly: 2016y-02m-25d-08h-16m-19s UTC integration manifest
68243399a1ea0df70e2a004e733927ac45ac355c drm/i915: Set invert bit for hpd based on VBT
8cb41eb42a5e8d8c010b8a1fd494b12e8d8c4042 drm/i915: Update VBT fields for child devices
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Update VBT fields for child devices
2016-03-11 12:53 [PATCH 1/2] " Shubhangi Shrivastava
@ 2016-03-11 13:10 ` Patchwork
0 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2016-03-11 13:10 UTC (permalink / raw)
To: Shubhangi Shrivastava; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Update VBT fields for child devices
URL : https://patchwork.freedesktop.org/series/4357/
State : failure
== Summary ==
CC drivers/input/mouse/focaltech.o
CC net/ipv6/exthdrs_offload.o
CC drivers/input/mouse/alps.o
LD drivers/input/serio/built-in.o
CC net/ipv6/inet6_hashtables.o
CC net/ipv6/mcast_snoop.o
LD net/ipv6/ipv6.o
CC drivers/input/mouse/elantech.o
CC net/xfrm/xfrm_algo.o
CC drivers/input/mouse/logips2pp.o
CC net/xfrm/xfrm_user.o
CC drivers/input/mouse/lifebook.o
CC drivers/input/mouse/trackpoint.o
CC drivers/input/mouse/cypress_ps2.o
CC [M] drivers/input/mouse/synaptics_usb.o
LD drivers/input/keyboard/built-in.o
LD net/ipv4/built-in.o
LD drivers/input/input-core.o
LD drivers/hid/usbhid/usbhid.o
LD drivers/hid/usbhid/built-in.o
LD drivers/hid/built-in.o
LD net/ipv6/built-in.o
LD drivers/input/mouse/psmouse.o
LD drivers/input/mouse/built-in.o
LD drivers/input/built-in.o
Makefile:950: recipe for target 'drivers' failed
make: *** [drivers] Error 2
make: *** Waiting for unfinished jobs....
LD net/xfrm/built-in.o
LD net/built-in.o
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Update VBT fields for child devices
2016-03-11 13:43 [PATCH 1/2] " Shubhangi Shrivastava
@ 2016-03-11 15:30 ` Patchwork
0 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2016-03-11 15:30 UTC (permalink / raw)
To: Shubhangi Shrivastava; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Update VBT fields for child devices
URL : https://patchwork.freedesktop.org/series/4360/
State : failure
== Summary ==
Series 4360v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/4360/revisions/1/mbox/
Test core_prop_blob:
Subgroup basic:
incomplete -> PASS (bsw-nuc-2)
Test gem_ctx_param_basic:
Subgroup invalid-param-get:
incomplete -> PASS (bsw-nuc-2)
Subgroup invalid-size-set:
incomplete -> PASS (bsw-nuc-2)
Test gem_exec_basic:
Subgroup gtt-bsd1:
incomplete -> SKIP (bsw-nuc-2)
Subgroup readonly-bsd:
incomplete -> PASS (bsw-nuc-2)
Test gem_flink_basic:
Subgroup flink-lifetime:
incomplete -> PASS (bsw-nuc-2)
Test gem_mmap_gtt:
Subgroup basic-small-copy-xy:
incomplete -> PASS (bsw-nuc-2)
Test gem_ringfill:
Subgroup basic-default-hang:
incomplete -> PASS (bsw-nuc-2)
Subgroup basic-default-interruptible:
pass -> INCOMPLETE (byt-nuc)
Subgroup basic-default-s3:
pass -> DMESG-WARN (bsw-nuc-2)
dmesg-warn -> FAIL (byt-nuc)
Test gem_storedw_loop:
Subgroup basic-bsd1:
incomplete -> SKIP (bsw-nuc-2)
Test gem_sync:
Subgroup basic-blt:
incomplete -> PASS (bsw-nuc-2)
Test gem_tiled_blits:
Subgroup basic:
incomplete -> PASS (bsw-nuc-2)
Test kms_addfb_basic:
Subgroup basic:
incomplete -> PASS (bsw-nuc-2)
Subgroup basic-x-tiled:
incomplete -> PASS (bsw-nuc-2)
Subgroup bo-too-small-due-to-tiling:
incomplete -> PASS (bsw-nuc-2)
Subgroup clobberred-modifier:
incomplete -> PASS (bsw-nuc-2)
Test kms_force_connector_basic:
Subgroup prune-stale-modes:
pass -> SKIP (snb-x220t)
Test kms_pipe_crc_basic:
Subgroup bad-pipe:
incomplete -> PASS (bsw-nuc-2)
Subgroup nonblocking-crc-pipe-a:
incomplete -> SKIP (bsw-nuc-2)
Subgroup nonblocking-crc-pipe-a-frame-sequence:
incomplete -> SKIP (bsw-nuc-2)
Subgroup nonblocking-crc-pipe-b:
incomplete -> SKIP (bsw-nuc-2)
Subgroup read-crc-pipe-b:
pass -> DMESG-WARN (bdw-ultra)
Subgroup read-crc-pipe-b-frame-sequence:
pass -> DMESG-WARN (snb-x220t)
Subgroup suspend-read-crc-pipe-a:
dmesg-warn -> FAIL (byt-nuc)
Subgroup suspend-read-crc-pipe-c:
skip -> FAIL (byt-nuc)
Test kms_sink_crc_basic:
incomplete -> SKIP (bsw-nuc-2)
Test pm_rpm:
Subgroup basic-pci-d3-state:
dmesg-fail -> FAIL (snb-x220t)
incomplete -> PASS (bsw-nuc-2)
pass -> DMESG-WARN (snb-dellxps)
dmesg-warn -> PASS (byt-nuc)
Test prime_self_import:
Subgroup basic-llseek-size:
incomplete -> PASS (bsw-nuc-2)
bdw-nuci7 total:194 pass:182 dwarn:0 dfail:0 fail:0 skip:12
bdw-ultra total:194 pass:172 dwarn:1 dfail:0 fail:0 skip:21
bsw-nuc-2 total:194 pass:156 dwarn:1 dfail:0 fail:0 skip:37
byt-nuc total:192 pass:152 dwarn:2 dfail:0 fail:3 skip:34
hsw-brixbox total:194 pass:169 dwarn:3 dfail:0 fail:0 skip:22
hsw-gt2 total:194 pass:177 dwarn:0 dfail:0 fail:0 skip:17
ivb-t430s total:194 pass:169 dwarn:0 dfail:0 fail:0 skip:25
skl-i5k-2 total:194 pass:171 dwarn:0 dfail:0 fail:0 skip:23
skl-i7k-2 total:194 pass:171 dwarn:0 dfail:0 fail:0 skip:23
skl-nuci5 total:194 pass:183 dwarn:0 dfail:0 fail:0 skip:11
snb-dellxps total:194 pass:158 dwarn:2 dfail:0 fail:0 skip:34
snb-x220t total:194 pass:158 dwarn:1 dfail:0 fail:1 skip:34
Results at /archive/results/CI_IGT_test/Patchwork_1579/
571147d0be8b04cbbe99db761e82ef105c6f82ad drm-intel-nightly: 2016y-03m-11d-13h-31m-03s UTC integration manifest
29be8dfcb20fbeef253b3b691946f69f7dffb984 drm/i915: Set invert bit for hpd based on VBT
55cf24dde1ae4f0d32a0ed4e3de6af7073d5a4a7 drm/i915: Update VBT fields for child devices
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Update VBT fields for child devices
2016-03-31 10:41 [PATCH 1/2] " Shubhangi Shrivastava
@ 2016-03-31 16:40 ` Patchwork
0 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2016-03-31 16:40 UTC (permalink / raw)
To: Shubhangi Shrivastava; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Update VBT fields for child devices
URL : https://patchwork.freedesktop.org/series/5095/
State : failure
== Summary ==
Series 5095v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/5095/revisions/1/mbox/
Test gem_exec_suspend:
Subgroup basic-s3:
dmesg-warn -> INCOMPLETE (bsw-nuc-2)
Test pm_rpm:
Subgroup basic-rte:
pass -> DMESG-WARN (bsw-nuc-2)
bdw-nuci7 total:196 pass:184 dwarn:0 dfail:0 fail:0 skip:12
bsw-nuc-2 total:114 pass:89 dwarn:1 dfail:0 fail:0 skip:23
byt-nuc total:196 pass:161 dwarn:0 dfail:0 fail:0 skip:35
hsw-brixbox total:196 pass:174 dwarn:0 dfail:0 fail:0 skip:22
hsw-gt2 total:81 pass:76 dwarn:0 dfail:0 fail:0 skip:4
skl-i7k-2 total:196 pass:173 dwarn:0 dfail:0 fail:0 skip:23
skl-nuci5 total:196 pass:185 dwarn:0 dfail:0 fail:0 skip:11
Results at /archive/results/CI_IGT_test/Patchwork_1764/
d42383d7815f4498871e8d73f10677cf1e48aa28 drm-intel-nightly: 2016y-03m-31d-14h-56m-52s UTC integration manifest
b178c2d87d15683606dc0ab01af9cf6be9dc9f09 drm/i915: Set invert bit for hpd based on VBT
2353f468233d83da6e45c337d6c0874b0d55e745 drm/i915: Update VBT fields for child devices
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2016-03-31 16:40 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-02-12 13:09 [PATCH 1/2] drm/i915: Update VBT fields for child devices Shubhangi Shrivastava
2016-02-12 13:09 ` [PATCH 2/2] drm/i915: Set invert bit for hpd based on VBT Shubhangi Shrivastava
2016-02-12 13:37 ` kbuild test robot
2016-02-12 14:08 ` Ville Syrjälä
2016-02-16 1:59 ` Thulasimani, Sivakumar
2016-02-16 9:41 ` Ville Syrjälä
2016-02-16 8:52 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Update VBT fields for child devices Patchwork
2016-02-16 12:23 ` [PATCH 1/2] " Jani Nikula
-- strict thread matches above, loose matches on Subject: below --
2016-02-25 9:57 Shubhangi Shrivastava
2016-02-25 11:34 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] " Patchwork
2016-03-11 12:53 [PATCH 1/2] " Shubhangi Shrivastava
2016-03-11 13:10 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] " Patchwork
2016-03-11 13:43 [PATCH 1/2] " Shubhangi Shrivastava
2016-03-11 15:30 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] " Patchwork
2016-03-31 10:41 [PATCH 1/2] " Shubhangi Shrivastava
2016-03-31 16:40 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] " Patchwork
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