* [PATCH RESEND FOR CI] drm/i915/bxt: Initialize MIPI DSI for BXT
@ 2016-02-17 13:18 Jani Nikula
2016-02-17 15:24 ` ✗ Fi.CI.BAT: failure for " Patchwork
2016-02-19 9:20 ` [PATCH RESEND FOR CI] " Jani Nikula
0 siblings, 2 replies; 3+ messages in thread
From: Jani Nikula @ 2016-02-17 13:18 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
From: Shashank Sharma <shashank.sharma@intel.com>
This patch contains following changes:
1. Add BXT MIPI display address base.
2. Call dsi_init from display_setup function.
v2: Rebased on latest nightly branch
v3 by Jani: init dsi after ddi
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_display.c | 2 ++
drivers/gpu/drm/i915/intel_dsi.c | 2 ++
3 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 3774870477c1..17b3b7915c70 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1795,6 +1795,7 @@ enum skl_disp_power_wells {
#define VLV_DISPLAY_BASE 0x180000
#define VLV_MIPI_BASE VLV_DISPLAY_BASE
+#define BXT_MIPI_BASE 0x60000
#define VLV_GU_CTL0 _MMIO(VLV_DISPLAY_BASE + 0x2030)
#define VLV_GU_CTL1 _MMIO(VLV_DISPLAY_BASE + 0x2034)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index aedddaabc06b..63090e7cd489 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -14411,6 +14411,8 @@ static void intel_setup_outputs(struct drm_device *dev)
intel_ddi_init(dev, PORT_A);
intel_ddi_init(dev, PORT_B);
intel_ddi_init(dev, PORT_C);
+
+ intel_dsi_init(dev);
} else if (HAS_DDI(dev)) {
int found;
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 378f879f4015..c28826a77f71 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -1117,6 +1117,8 @@ void intel_dsi_init(struct drm_device *dev)
if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) {
dev_priv->mipi_mmio_base = VLV_MIPI_BASE;
+ } else if (IS_BROXTON(dev)) {
+ dev_priv->mipi_mmio_base = BXT_MIPI_BASE;
} else {
DRM_ERROR("Unsupported Mipi device to reg base");
return;
--
2.1.4
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 3+ messages in thread* ✗ Fi.CI.BAT: failure for drm/i915/bxt: Initialize MIPI DSI for BXT
2016-02-17 13:18 [PATCH RESEND FOR CI] drm/i915/bxt: Initialize MIPI DSI for BXT Jani Nikula
@ 2016-02-17 15:24 ` Patchwork
2016-02-19 9:20 ` [PATCH RESEND FOR CI] " Jani Nikula
1 sibling, 0 replies; 3+ messages in thread
From: Patchwork @ 2016-02-17 15:24 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
== Summary ==
Series 3522v1 drm/i915/bxt: Initialize MIPI DSI for BXT
http://patchwork.freedesktop.org/api/1.0/series/3522/revisions/1/mbox/
Test drv_hangman:
Subgroup error-state-basic:
incomplete -> PASS (snb-dellxps)
Test kms_flip:
Subgroup basic-flip-vs-wf_vblank:
fail -> PASS (bsw-nuc-2)
Test kms_force_connector_basic:
Subgroup force-load-detect:
skip -> FAIL (ilk-hp8440p)
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-a:
pass -> DMESG-WARN (skl-i5k-2)
Subgroup suspend-read-crc-pipe-b:
dmesg-warn -> PASS (skl-i5k-2)
Subgroup suspend-read-crc-pipe-c:
pass -> DMESG-WARN (bsw-nuc-2)
Test pm_rpm:
Subgroup basic-rte:
pass -> DMESG-WARN (bsw-nuc-2)
bdw-nuci7 total:162 pass:152 dwarn:0 dfail:0 fail:0 skip:10
bsw-nuc-2 total:165 pass:134 dwarn:2 dfail:0 fail:0 skip:29
byt-nuc total:165 pass:141 dwarn:0 dfail:0 fail:0 skip:24
hsw-gt2 total:165 pass:154 dwarn:0 dfail:0 fail:1 skip:10
ilk-hp8440p total:165 pass:115 dwarn:1 dfail:0 fail:1 skip:48
ivb-t430s total:165 pass:150 dwarn:0 dfail:0 fail:1 skip:14
skl-i5k-2 total:165 pass:149 dwarn:1 dfail:0 fail:0 skip:15
snb-dellxps total:165 pass:142 dwarn:0 dfail:0 fail:1 skip:22
Results at /archive/results/CI_IGT_test/Patchwork_1425/
a868b844abfbce5f574665319f51d397416ae49b drm-intel-nightly: 2016y-02m-17d-14h-18m-14s UTC integration manifest
f957ea329c37adb14791f4971fce6601c5d07dfd drm/i915/bxt: Initialize MIPI DSI for BXT
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH RESEND FOR CI] drm/i915/bxt: Initialize MIPI DSI for BXT
2016-02-17 13:18 [PATCH RESEND FOR CI] drm/i915/bxt: Initialize MIPI DSI for BXT Jani Nikula
2016-02-17 15:24 ` ✗ Fi.CI.BAT: failure for " Patchwork
@ 2016-02-19 9:20 ` Jani Nikula
1 sibling, 0 replies; 3+ messages in thread
From: Jani Nikula @ 2016-02-19 9:20 UTC (permalink / raw)
To: intel-gfx
On Wed, 17 Feb 2016, Jani Nikula <jani.nikula@intel.com> wrote:
> From: Shashank Sharma <shashank.sharma@intel.com>
>
> This patch contains following changes:
> 1. Add BXT MIPI display address base.
> 2. Call dsi_init from display_setup function.
>
> v2: Rebased on latest nightly branch
>
> v3 by Jani: init dsi after ddi
>
> Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
The reason this is not pushed is that we should get DSI working *before*
enabling it. If we push this now, loading the driver may block booting
due to incomplete DSI support. That's not acceptable, as it may block
other people doing something completely different on hardware with BXT
DSI.
BR,
Jani.
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_display.c | 2 ++
> drivers/gpu/drm/i915/intel_dsi.c | 2 ++
> 3 files changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 3774870477c1..17b3b7915c70 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1795,6 +1795,7 @@ enum skl_disp_power_wells {
>
> #define VLV_DISPLAY_BASE 0x180000
> #define VLV_MIPI_BASE VLV_DISPLAY_BASE
> +#define BXT_MIPI_BASE 0x60000
>
> #define VLV_GU_CTL0 _MMIO(VLV_DISPLAY_BASE + 0x2030)
> #define VLV_GU_CTL1 _MMIO(VLV_DISPLAY_BASE + 0x2034)
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index aedddaabc06b..63090e7cd489 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -14411,6 +14411,8 @@ static void intel_setup_outputs(struct drm_device *dev)
> intel_ddi_init(dev, PORT_A);
> intel_ddi_init(dev, PORT_B);
> intel_ddi_init(dev, PORT_C);
> +
> + intel_dsi_init(dev);
> } else if (HAS_DDI(dev)) {
> int found;
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> index 378f879f4015..c28826a77f71 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -1117,6 +1117,8 @@ void intel_dsi_init(struct drm_device *dev)
>
> if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) {
> dev_priv->mipi_mmio_base = VLV_MIPI_BASE;
> + } else if (IS_BROXTON(dev)) {
> + dev_priv->mipi_mmio_base = BXT_MIPI_BASE;
> } else {
> DRM_ERROR("Unsupported Mipi device to reg base");
> return;
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 3+ messages in thread
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2016-02-17 13:18 [PATCH RESEND FOR CI] drm/i915/bxt: Initialize MIPI DSI for BXT Jani Nikula
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2016-02-19 9:20 ` [PATCH RESEND FOR CI] " Jani Nikula
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