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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 0/6] drm/i915: Some FDI related dotclock stuff
Date: Tue, 1 Mar 2016 13:13:40 +0200	[thread overview]
Message-ID: <20160301111340.GH15993@intel.com> (raw)
In-Reply-To: <1455738073-14502-1-git-send-email-ville.syrjala@linux.intel.com>

On Wed, Feb 17, 2016 at 09:41:07PM +0200, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Imre's SNB had a crappy BIOS that failed to configure the hardware
> correctly when hooked up to a 4K monitor, which then resulted in
> lots of noise from i915 when it was trying to make sense of the bad
> state. That spurred me to reorganize the FDI dotclock vs. encoder
> dotclock sanity check we have in the encoder .get_config() hooks.
> And while doing that I figured we might as well try to read out
> the actual VGA dotclock via sideband on HSW/BDW, which can then
> be compared to the one compute from FDI parameters.
> 
> Apparently a BIOS update solved the problem for Imre, but I think
> these patches still have some value by adding more thorough state
> cross checking on HSW/BDW, and just moving out the sanity checks
> from the state readout code makes quite a bit of sense to me, 
> especially if we run into more buggy BIOSen. Though if people
> prefer, I could respin these without that particular change,
> ie. just keep the LPT-H dotclock readout and cross checking
> essentially.
> 
> I also ended up fixing the port clock limits for CRT for various
> platforms.
> 
> Ville Syrjälä (6):
>   drm/i915: Dump ddi_pll_sel in hex instead of decimal on HSW/BDW
>   drm/i915: Move the encoder vs. FDI dotclock check out from encoder
>     .get_config()
>   drm/i915: Remove the SPLL==270Mhz assumption from
>     intel_fdi_link_freq()
>   drm/i915: Make the LPT iclkip 20MHz case more generic
>   drm/i915: Read out VGA dotclock properly on LPT
>   drm/i915: Try to fix CRT port clock limits

Entire series pushed to dinq. Thanks for the reviews.

> 
>  drivers/gpu/drm/i915/i915_reg.h      |   8 +-
>  drivers/gpu/drm/i915/intel_crt.c     |  30 ++++----
>  drivers/gpu/drm/i915/intel_display.c | 143 +++++++++++++++++++++++------------
>  drivers/gpu/drm/i915/intel_dp.c      |  11 +--
>  drivers/gpu/drm/i915/intel_drv.h     |   4 +-
>  drivers/gpu/drm/i915/intel_hdmi.c    |   3 -
>  drivers/gpu/drm/i915/intel_lvds.c    |   8 +-
>  drivers/gpu/drm/i915/intel_sdvo.c    |   4 +-
>  8 files changed, 123 insertions(+), 88 deletions(-)
> 
> -- 
> 2.4.10

-- 
Ville Syrjälä
Intel OTC
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      parent reply	other threads:[~2016-03-01 11:13 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-17 19:41 [PATCH 0/6] drm/i915: Some FDI related dotclock stuff ville.syrjala
2016-02-17 19:41 ` [PATCH 1/6] drm/i915: Dump ddi_pll_sel in hex instead of decimal on HSW/BDW ville.syrjala
2016-02-18 13:19   ` Imre Deak
2016-02-17 19:41 ` [PATCH 2/6] drm/i915: Move the encoder vs. FDI dotclock check out from encoder .get_config() ville.syrjala
2016-02-18 18:18   ` Imre Deak
2016-02-17 19:41 ` [PATCH 3/6] drm/i915: Remove the SPLL==270Mhz assumption from intel_fdi_link_freq() ville.syrjala
2016-02-18 18:28   ` Imre Deak
2016-02-17 19:41 ` [PATCH 4/6] drm/i915: Make the LPT iclkip 20MHz case more generic ville.syrjala
2016-02-19 13:54   ` Zanoni, Paulo R
2016-02-19 14:04   ` Imre Deak
2016-02-17 19:41 ` [PATCH 5/6] drm/i915: Read out VGA dotclock properly on LPT ville.syrjala
2016-02-19 14:17   ` Imre Deak
2016-02-17 19:41 ` [PATCH 6/6] drm/i915: Try to fix CRT port clock limits ville.syrjala
2016-02-19 14:58   ` Imre Deak
2016-02-19 13:45 ` ✗ Fi.CI.BAT: failure for drm/i915: Some FDI related dotclock stuff Patchwork
2016-02-25 18:15   ` Ville Syrjälä
2016-03-01 11:13 ` Ville Syrjälä [this message]

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