From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 3/4] drm/i915/ddi: Fix eDP VDD handling during booting and suspend/resume Date: Mon, 18 Apr 2016 14:05:30 +0300 Message-ID: <20160418110530.GD4329@intel.com> References: <1460963062-13211-1-git-send-email-imre.deak@intel.com> <1460963062-13211-4-git-send-email-imre.deak@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: Content-Disposition: inline In-Reply-To: <1460963062-13211-4-git-send-email-imre.deak@intel.com> Sender: stable-owner@vger.kernel.org To: Imre Deak Cc: intel-gfx@lists.freedesktop.org, stable@vger.kernel.org List-Id: intel-gfx@lists.freedesktop.org On Mon, Apr 18, 2016 at 10:04:21AM +0300, Imre Deak wrote: > The driver's VDD on/off logic assumes that whenever the VDD is on we > also hold an AUX power domain reference. Since BIOS can leave the VDD= on > during booting and resuming and on DDI platforms we won't take a > corresponding power reference, the above assumption won't hold on tho= se > platforms and an eventual delayed VDD off work will do an extraneous = AUX > power domain put resulting in a refcount underflow. Fix this the same > way we did this for non-DDI DP encoders: >=20 > 6d93c0c41760c0 ("drm/i915: fix VDD state tracking after system resume= ") >=20 > At the same time call the DP encoder suspend handler the same way as = the > non-DDI DP encoders do to flush any pending VDD off work. Leaving the > work running may cause a HW access where we don't expect this (at a p= oint > where power domains are suspended already). >=20 > While at it remove an unnecessary function call indirection. >=20 > This fixed for me AUX refcount underflow problems on BXT during > suspend/resume. >=20 > CC: Ville Syrj=E4l=E4 > CC: stable@vger.kernel.org > Signed-off-by: Imre Deak Reviewed-by: Ville Syrj=E4l=E4 > --- > drivers/gpu/drm/i915/intel_ddi.c | 10 +++------- > drivers/gpu/drm/i915/intel_dp.c | 4 ++-- > drivers/gpu/drm/i915/intel_drv.h | 2 ++ > 3 files changed, 7 insertions(+), 9 deletions(-) >=20 > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/= intel_ddi.c > index 96234c5..c2348fb 100644 > --- a/drivers/gpu/drm/i915/intel_ddi.c > +++ b/drivers/gpu/drm/i915/intel_ddi.c > @@ -2206,12 +2206,6 @@ void intel_ddi_get_config(struct intel_encoder= *encoder, > intel_ddi_clock_get(encoder, pipe_config); > } > =20 > -static void intel_ddi_destroy(struct drm_encoder *encoder) > -{ > - /* HDMI has nothing special to destroy, so we can go with this. */ > - intel_dp_encoder_destroy(encoder); > -} > - > static bool intel_ddi_compute_config(struct intel_encoder *encoder, > struct intel_crtc_state *pipe_config) > { > @@ -2230,7 +2224,8 @@ static bool intel_ddi_compute_config(struct int= el_encoder *encoder, > } > =20 > static const struct drm_encoder_funcs intel_ddi_funcs =3D { > - .destroy =3D intel_ddi_destroy, > + .reset =3D intel_dp_encoder_reset, > + .destroy =3D intel_dp_encoder_destroy, > }; > =20 > static struct intel_connector * > @@ -2329,6 +2324,7 @@ void intel_ddi_init(struct drm_device *dev, enu= m port port) > intel_encoder->post_disable =3D intel_ddi_post_disable; > intel_encoder->get_hw_state =3D intel_ddi_get_hw_state; > intel_encoder->get_config =3D intel_ddi_get_config; > + intel_encoder->suspend =3D intel_dp_encoder_suspend; > =20 > intel_dig_port->port =3D port; > intel_dig_port->saved_port_bits =3D I915_READ(DDI_BUF_CTL(port)) & > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/i= ntel_dp.c > index 61ee226..c6af3d0 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -4889,7 +4889,7 @@ void intel_dp_encoder_destroy(struct drm_encode= r *encoder) > kfree(intel_dig_port); > } > =20 > -static void intel_dp_encoder_suspend(struct intel_encoder *intel_enc= oder) > +void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder) > { > struct intel_dp *intel_dp =3D enc_to_intel_dp(&intel_encoder->base)= ; > =20 > @@ -4931,7 +4931,7 @@ static void intel_edp_panel_vdd_sanitize(struct= intel_dp *intel_dp) > edp_panel_vdd_schedule_off(intel_dp); > } > =20 > -static void intel_dp_encoder_reset(struct drm_encoder *encoder) > +void intel_dp_encoder_reset(struct drm_encoder *encoder) > { > struct intel_dp *intel_dp; > =20 > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/= intel_drv.h > index e13ce22..10dfe72 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -1285,6 +1285,8 @@ void intel_dp_set_link_params(struct intel_dp *= intel_dp, > void intel_dp_start_link_train(struct intel_dp *intel_dp); > void intel_dp_stop_link_train(struct intel_dp *intel_dp); > void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode); > +void intel_dp_encoder_reset(struct drm_encoder *encoder); > +void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder); > void intel_dp_encoder_destroy(struct drm_encoder *encoder); > int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc); > bool intel_dp_compute_config(struct intel_encoder *encoder, > --=20 > 2.5.0 --=20 Ville Syrj=E4l=E4 Intel OTC