[PATCH 1/3] drm/i915: Do CRT HPD force trigger only when needed

[PATCH 1/3] drm/i915: Do CRT HPD force trigger only when needed

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

There doesn't seem to be any need to for the force trigger trick every
single time on VLV CRT output. Let's do it the same way as on ILK+, and
do the force trigger only on the first detect after reset.

This means we can actually just call the ILK+ code on VLV. The only
difference between the two is the "turn DAC off" trick, but that's
already conditional on HAS_PCH_SPLIT() so it won't be done on VLV.

Cc: Lyude <cpaul@redhat.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_crt.c | 39 +--------------------------------------
 1 file changed, 1 insertion(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index a2a31fd01d1d..d10dea5bd08a 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -316,40 +316,6 @@ static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 	return ret;
 }
 
-static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
-{
-	struct drm_device *dev = connector->dev;
-	struct intel_crt *crt = intel_attached_crt(connector);
-	struct drm_i915_private *dev_priv = dev->dev_private;
-	u32 adpa;
-	bool ret;
-	u32 save_adpa;
-
-	save_adpa = adpa = I915_READ(crt->adpa_reg);
-	DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
-
-	adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
-
-	I915_WRITE(crt->adpa_reg, adpa);
-
-	if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
-		     1000)) {
-		DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
-		I915_WRITE(crt->adpa_reg, save_adpa);
-	}
-
-	/* Check the status to see if both blue and green are on now */
-	adpa = I915_READ(crt->adpa_reg);
-	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
-		ret = true;
-	else
-		ret = false;
-
-	DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
-
-	return ret;
-}
-
 /**
  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
  *
@@ -366,12 +332,9 @@ static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 	bool ret = false;
 	int i, tries = 0;
 
-	if (HAS_PCH_SPLIT(dev))
+	if (HAS_PCH_SPLIT(dev) || IS_VALLEYVIEW(dev))
 		return intel_ironlake_crt_detect_hotplug(connector);
 
-	if (IS_VALLEYVIEW(dev))
-		return valleyview_crt_detect_hotplug(connector);
-
 	/*
 	 * On 4 series desktop, CRT detect sequence need to be done twice
 	 * to get a reliable result.
-- 
2.7.4

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[PATCH 2/3] drm/i915: Disable CRT HPD around force trigger

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The CRT HPD force trigger will generate a HPD irq. Let's ignore it since
we're already doing the detect and there's no point in scheduling
another one immediately.

This is rather important on VLV since turning on the disp2d power well
will trigger a CRT HPD and when processing it we'll do the force
trigger. If we were to schedule another cycle of HPD processing due to
the force trigger, we might end up in an infinite loop:
turn on disp2d -> crt hpd -> run hpd work -> force trigger ->
crt hpd -> turn off disp2d -> run hpd work -> turn on disp2d -> crt hpd
-> ...

Cc: Lyude <cpaul@redhat.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h      |  2 ++
 drivers/gpu/drm/i915/intel_crt.c     |  6 ++++++
 drivers/gpu/drm/i915/intel_hotplug.c | 27 +++++++++++++++++++++++++++
 3 files changed, 35 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 85102ad75962..cd9e64c16d73 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2777,6 +2777,8 @@ void intel_hpd_init(struct drm_i915_private *dev_priv);
 void intel_hpd_init_work(struct drm_i915_private *dev_priv);
 void intel_hpd_cancel_work(struct drm_i915_private *dev_priv);
 bool intel_hpd_pin_to_port(enum hpd_pin pin, enum port *port);
+bool intel_hpd_disable(struct drm_i915_private *dev_priv, enum hpd_pin pin);
+void intel_hpd_enable(struct drm_i915_private *dev_priv, enum hpd_pin pin);
 
 /* i915_irq.c */
 void i915_queue_hangcheck(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index d10dea5bd08a..e8597d77cf6d 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -282,6 +282,7 @@ static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 	/* The first time through, trigger an explicit detection cycle */
 	if (crt->force_hotplug_required) {
 		bool turn_off_dac = HAS_PCH_SPLIT(dev);
+		bool enable_hpd;
 		u32 save_adpa;
 
 		crt->force_hotplug_required = 0;
@@ -289,6 +290,8 @@ static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 		save_adpa = adpa = I915_READ(crt->adpa_reg);
 		DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 
+		enable_hpd = intel_hpd_disable(dev_priv, crt->base.hpd_pin);
+
 		adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 		if (turn_off_dac)
 			adpa &= ~ADPA_DAC_ENABLE;
@@ -303,6 +306,9 @@ static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 			I915_WRITE(crt->adpa_reg, save_adpa);
 			POSTING_READ(crt->adpa_reg);
 		}
+
+		if (enable_hpd)
+			intel_hpd_enable(dev_priv, crt->base.hpd_pin);
 	}
 
 	/* Check the status to see if both blue and green are on now */
diff --git a/drivers/gpu/drm/i915/intel_hotplug.c b/drivers/gpu/drm/i915/intel_hotplug.c
index bee673005d48..0c9ee3fe4c1f 100644
--- a/drivers/gpu/drm/i915/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/intel_hotplug.c
@@ -511,3 +511,30 @@ void intel_hpd_cancel_work(struct drm_i915_private *dev_priv)
 	cancel_work_sync(&dev_priv->hotplug.hotplug_work);
 	cancel_delayed_work_sync(&dev_priv->hotplug.reenable_work);
 }
+
+bool intel_hpd_disable(struct drm_i915_private *dev_priv, enum hpd_pin pin)
+{
+	bool ret = false;
+
+	if (pin == HPD_NONE)
+		return false;
+
+	spin_lock_irq(&dev_priv->irq_lock);
+	if (dev_priv->hotplug.stats[pin].state == HPD_ENABLED) {
+		dev_priv->hotplug.stats[pin].state = HPD_DISABLED;
+		ret = true;
+	}
+	spin_unlock_irq(&dev_priv->irq_lock);
+
+	return ret;
+}
+
+void intel_hpd_enable(struct drm_i915_private *dev_priv, enum hpd_pin pin)
+{
+	if (pin == HPD_NONE)
+		return;
+
+	spin_lock_irq(&dev_priv->irq_lock);
+	dev_priv->hotplug.stats[pin].state = HPD_ENABLED;
+	spin_unlock_irq(&dev_priv->irq_lock);
+}
-- 
2.7.4

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[PATCH 3/3] drm/i915: Always power on TX wells before CMN well on VLV

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Supposedly we need to power on the TX wells before CMN well on VLV.
We currently do that when enabling HDMI/DP ports, but when we enable
the CRT port we only power up the CMN well. So if someone enables the
CRT port first, and then HDMI/DP the wells will power up in the supposed
wrong order.

I can't actually reproduce any issues when I power on the wells in the
wrong order, so I'm not 100% convinced we couldn't just go back to the
original order. But I suppose it's possible there are machines that are
more sensitive, so let's make sure we follow the order we know to work.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_runtime_pm.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 259f66f94854..4fdd1ebdf6da 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -1786,7 +1786,8 @@ static struct i915_power_well vlv_power_wells[] = {
 		.domains = VLV_DPIO_TX_B_LANES_01_POWER_DOMAINS |
 			   VLV_DPIO_TX_B_LANES_23_POWER_DOMAINS |
 			   VLV_DPIO_TX_C_LANES_01_POWER_DOMAINS |
-			   VLV_DPIO_TX_C_LANES_23_POWER_DOMAINS,
+			   VLV_DPIO_TX_C_LANES_23_POWER_DOMAINS |
+			   VLV_DPIO_CMN_BC_POWER_DOMAINS,
 		.ops = &vlv_dpio_power_well_ops,
 		.data = PUNIT_POWER_WELL_DPIO_TX_B_LANES_01,
 	},
@@ -1795,7 +1796,8 @@ static struct i915_power_well vlv_power_wells[] = {
 		.domains = VLV_DPIO_TX_B_LANES_01_POWER_DOMAINS |
 			   VLV_DPIO_TX_B_LANES_23_POWER_DOMAINS |
 			   VLV_DPIO_TX_C_LANES_01_POWER_DOMAINS |
-			   VLV_DPIO_TX_C_LANES_23_POWER_DOMAINS,
+			   VLV_DPIO_TX_C_LANES_23_POWER_DOMAINS |
+			   VLV_DPIO_CMN_BC_POWER_DOMAINS,
 		.ops = &vlv_dpio_power_well_ops,
 		.data = PUNIT_POWER_WELL_DPIO_TX_B_LANES_23,
 	},
@@ -1804,7 +1806,8 @@ static struct i915_power_well vlv_power_wells[] = {
 		.domains = VLV_DPIO_TX_B_LANES_01_POWER_DOMAINS |
 			   VLV_DPIO_TX_B_LANES_23_POWER_DOMAINS |
 			   VLV_DPIO_TX_C_LANES_01_POWER_DOMAINS |
-			   VLV_DPIO_TX_C_LANES_23_POWER_DOMAINS,
+			   VLV_DPIO_TX_C_LANES_23_POWER_DOMAINS |
+			   VLV_DPIO_CMN_BC_POWER_DOMAINS,
 		.ops = &vlv_dpio_power_well_ops,
 		.data = PUNIT_POWER_WELL_DPIO_TX_C_LANES_01,
 	},
@@ -1813,7 +1816,8 @@ static struct i915_power_well vlv_power_wells[] = {
 		.domains = VLV_DPIO_TX_B_LANES_01_POWER_DOMAINS |
 			   VLV_DPIO_TX_B_LANES_23_POWER_DOMAINS |
 			   VLV_DPIO_TX_C_LANES_01_POWER_DOMAINS |
-			   VLV_DPIO_TX_C_LANES_23_POWER_DOMAINS,
+			   VLV_DPIO_TX_C_LANES_23_POWER_DOMAINS |
+			   VLV_DPIO_CMN_BC_POWER_DOMAINS,
 		.ops = &vlv_dpio_power_well_ops,
 		.data = PUNIT_POWER_WELL_DPIO_TX_C_LANES_23,
 	},
-- 
2.7.4

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✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Do CRT HPD force trigger only when needed

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Do CRT HPD force trigger only when needed
URL   : https://patchwork.freedesktop.org/series/5884/
State : success

== Summary ==

Series 5884v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/5884/revisions/1/mbox/

Test gem_busy:
        Subgroup basic-vebox:
                skip       -> PASS       (bsw-nuc-2)
Test gem_sync:
        Subgroup basic-each:
                dmesg-fail -> PASS       (hsw-brixbox)
Test kms_pipe_crc_basic:
        Subgroup hang-read-crc-pipe-b:
                dmesg-warn -> PASS       (snb-dellxps)
        Subgroup suspend-read-crc-pipe-b:
                skip       -> PASS       (hsw-brixbox)

bdw-nuci7        total:203  pass:191  dwarn:0   dfail:0   fail:0   skip:12 
bdw-ultra        total:203  pass:180  dwarn:0   dfail:0   fail:0   skip:23 
bsw-nuc-2        total:202  pass:163  dwarn:0   dfail:0   fail:0   skip:39 
byt-nuc          total:202  pass:164  dwarn:0   dfail:0   fail:0   skip:38 
hsw-brixbox      total:203  pass:179  dwarn:0   dfail:0   fail:0   skip:24 
hsw-gt2          total:203  pass:184  dwarn:0   dfail:0   fail:0   skip:19 
ivb-t430s        total:203  pass:175  dwarn:0   dfail:0   fail:0   skip:28 
skl-i7k-2        total:203  pass:178  dwarn:0   dfail:0   fail:0   skip:25 
skl-nuci5        total:203  pass:192  dwarn:0   dfail:0   fail:0   skip:11 
snb-dellxps      total:203  pass:165  dwarn:0   dfail:0   fail:0   skip:38 
snb-x220t        total:203  pass:165  dwarn:0   dfail:0   fail:1   skip:37 

Results at /archive/results/CI_IGT_test/Patchwork_1931/

b1acc63c4301f12ef2ca31872d937641aaf3c9dc drm-intel-nightly: 2016y-04m-18d-15h-55m-43s UTC integration manifest
ce28af1 drm/i915: Always power on TX wells before CMN well on VLV
557c794 drm/i915: Disable CRT HPD around force trigger
5897e91 drm/i915: Do CRT HPD force trigger only when needed

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Re: [PATCH 1/3] drm/i915: Do CRT HPD force trigger only when needed

[Ville Syrjälä]

On Mon, Apr 18, 2016 at 07:03:23PM +0300, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> There doesn't seem to be any need to for the force trigger trick every
> single time on VLV CRT output. Let's do it the same way as on ILK+, and
> do the force trigger only on the first detect after reset.
> 
> This means we can actually just call the ILK+ code on VLV. The only
> difference between the two is the "turn DAC off" trick, but that's
> already conditional on HAS_PCH_SPLIT() so it won't be done on VLV.

Chris requested that I add a bit more details here, so let's amend this with:

The valleyview specific code was added
commit 7d2c24e8cd99 ("drm/i915: add ValleyView specific CRT detect function")
with no real details on why it always uses the force trigger, just a
vague comment about "bugs". It predates proper power well code, as well
as the "DPLL refclk needed for CRT hpd" fix from
commit e5cbfbfb2e0e ("drm/i915: vlv: W/a for hotplug/manual VGA detection")

> 
> Cc: Lyude <cpaul@redhat.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_crt.c | 39 +--------------------------------------
>  1 file changed, 1 insertion(+), 38 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
> index a2a31fd01d1d..d10dea5bd08a 100644
> --- a/drivers/gpu/drm/i915/intel_crt.c
> +++ b/drivers/gpu/drm/i915/intel_crt.c
> @@ -316,40 +316,6 @@ static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
>  	return ret;
>  }
>  
> -static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
> -{
> -	struct drm_device *dev = connector->dev;
> -	struct intel_crt *crt = intel_attached_crt(connector);
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -	u32 adpa;
> -	bool ret;
> -	u32 save_adpa;
> -
> -	save_adpa = adpa = I915_READ(crt->adpa_reg);
> -	DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
> -
> -	adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
> -
> -	I915_WRITE(crt->adpa_reg, adpa);
> -
> -	if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
> -		     1000)) {
> -		DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
> -		I915_WRITE(crt->adpa_reg, save_adpa);
> -	}
> -
> -	/* Check the status to see if both blue and green are on now */
> -	adpa = I915_READ(crt->adpa_reg);
> -	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
> -		ret = true;
> -	else
> -		ret = false;
> -
> -	DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
> -
> -	return ret;
> -}
> -
>  /**
>   * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
>   *
> @@ -366,12 +332,9 @@ static bool intel_crt_detect_hotplug(struct drm_connector *connector)
>  	bool ret = false;
>  	int i, tries = 0;
>  
> -	if (HAS_PCH_SPLIT(dev))
> +	if (HAS_PCH_SPLIT(dev) || IS_VALLEYVIEW(dev))
>  		return intel_ironlake_crt_detect_hotplug(connector);
>  
> -	if (IS_VALLEYVIEW(dev))
> -		return valleyview_crt_detect_hotplug(connector);
> -
>  	/*
>  	 * On 4 series desktop, CRT detect sequence need to be done twice
>  	 * to get a reliable result.
> -- 
> 2.7.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
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Re: [PATCH 1/3] drm/i915: Do CRT HPD force trigger only when needed

[Lyude]

Ironically I only started running into the hotplug loop issue you described once
I wrote some patches to enable hpd polling for vlv, so these came at the perfect
time. Anyway, tested these on an Intel NUC and reviewed them and they look good
to me.

For the whole series:

Reviewed-by: Lyude <cpaul@redhat.com>

On Mon, 2016-04-18 at 19:03 +0300, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> There doesn't seem to be any need to for the force trigger trick every
> single time on VLV CRT output. Let's do it the same way as on ILK+, and
> do the force trigger only on the first detect after reset.
> 
> This means we can actually just call the ILK+ code on VLV. The only
> difference between the two is the "turn DAC off" trick, but that's
> already conditional on HAS_PCH_SPLIT() so it won't be done on VLV.
> 
> Cc: Lyude <cpaul@redhat.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_crt.c | 39 +--------------------------------------
>  1 file changed, 1 insertion(+), 38 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_crt.c
> b/drivers/gpu/drm/i915/intel_crt.c
> index a2a31fd01d1d..d10dea5bd08a 100644
> --- a/drivers/gpu/drm/i915/intel_crt.c
> +++ b/drivers/gpu/drm/i915/intel_crt.c
> @@ -316,40 +316,6 @@ static bool intel_ironlake_crt_detect_hotplug(struct
> drm_connector *connector)
>  	return ret;
>  }
>  
> -static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
> -{
> -	struct drm_device *dev = connector->dev;
> -	struct intel_crt *crt = intel_attached_crt(connector);
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -	u32 adpa;
> -	bool ret;
> -	u32 save_adpa;
> -
> -	save_adpa = adpa = I915_READ(crt->adpa_reg);
> -	DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
> -
> -	adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
> -
> -	I915_WRITE(crt->adpa_reg, adpa);
> -
> -	if (wait_for((I915_READ(crt->adpa_reg) &
> ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
> -		     1000)) {
> -		DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
> -		I915_WRITE(crt->adpa_reg, save_adpa);
> -	}
> -
> -	/* Check the status to see if both blue and green are on now */
> -	adpa = I915_READ(crt->adpa_reg);
> -	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
> -		ret = true;
> -	else
> -		ret = false;
> -
> -	DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa,
> ret);
> -
> -	return ret;
> -}
> -
>  /**
>   * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
>   *
> @@ -366,12 +332,9 @@ static bool intel_crt_detect_hotplug(struct drm_connector
> *connector)
>  	bool ret = false;
>  	int i, tries = 0;
>  
> -	if (HAS_PCH_SPLIT(dev))
> +	if (HAS_PCH_SPLIT(dev) || IS_VALLEYVIEW(dev))
>  		return intel_ironlake_crt_detect_hotplug(connector);
>  
> -	if (IS_VALLEYVIEW(dev))
> -		return valleyview_crt_detect_hotplug(connector);
> -
>  	/*
>  	 * On 4 series desktop, CRT detect sequence need to be done twice
>  	 * to get a reliable result.
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