From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= <ville.syrjala@linux.intel.com>
Subject: Re: [PATCH 2/3] drm/i915/bxt: Wait for PHY1 GRC done if
 PHY0 was already enabled
Date: Thu, 21 Apr 2016 15:08:29 +0300
Message-ID: <20160421120829.GK4329@intel.com>
References: <1461174366-16758-1-git-send-email-imre.deak@intel.com>
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