Re: [PATCH 2/7] drm/i915: Use milliseconds in _wait_for macro

From: Daniel Vetter <daniel@ffwll.ch>
To: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/7] drm/i915: Use milliseconds in _wait_for macro
Date: Wed, 18 May 2016 10:18:19 +0200	[thread overview]
Message-ID: <20160518081819.GY27098@phenom.ffwll.local> (raw)
In-Reply-To: <1463499808-3335-3-git-send-email-mika.kuoppala@intel.com>

On Tue, May 17, 2016 at 06:43:23PM +0300, Mika Kuoppala wrote:
> Promising 1us accuracy where we timeout using jiffies is
> misleading. Convert the _wait_for macro to use milliseconds
> and convert the 2 callsites.
> 
> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c  |  4 ++--
>  drivers/gpu/drm/i915/intel_drv.h | 13 +++++++------
>  drivers/gpu/drm/i915/intel_psr.c |  6 +++---
>  3 files changed, 12 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 36330026ceff..a32617469816 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1699,8 +1699,8 @@ static void wait_panel_status(struct intel_dp *intel_dp,
>  			I915_READ(pp_stat_reg),
>  			I915_READ(pp_ctrl_reg));
>  
> -	if (_wait_for((I915_READ(pp_stat_reg) & mask) == value,
> -		      5 * USEC_PER_SEC, 10 * USEC_PER_MSEC))
> +	if (_wait_for_ms((I915_READ(pp_stat_reg) & mask) == value,
> +			 5 * MSEC_PER_SEC, 10 * USEC_PER_MSEC))
>  		DRM_ERROR("Panel status timeout: status %08x control %08x\n",
>  				I915_READ(pp_stat_reg),
>  				I915_READ(pp_ctrl_reg));
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 0fc8579e7b2e..488141929a7a 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -39,7 +39,7 @@
>  #include <drm/drm_atomic.h>
>  
>  /**
> - * _wait_for - magic (register) wait macro
> + * _wait_for_ms - magic (register) wait macro
>   *
>   * Does the right thing for modeset paths when run under kdgb or similar atomic
>   * contexts. Note that it's important that we check the condition again after
> @@ -50,8 +50,9 @@
>   * drm_can_sleep() can be removed and in_atomic()/!in_atomic() asserts
>   * added.
>   */
> -#define _wait_for(COND, US, W) ({ \
> -	unsigned long timeout__ = jiffies + usecs_to_jiffies(US) + 1;	\
> +#define _wait_for_ms(COND, TIMEOUT_MS, SLEEP_US) ({ \
> +	const unsigned long timeout__ =					\
> +		jiffies + msecs_to_jiffies(TIMEOUT_MS) + 1;		\

msec_to_jiffies_timeout()

Otherwise Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>


>  	int ret__ = 0;							\
>  	while (!(COND)) {						\
>  		if (time_after(jiffies, timeout__)) {			\
> @@ -59,8 +60,8 @@
>  				ret__ = -ETIMEDOUT;			\
>  			break;						\
>  		}							\
> -		if ((W) && drm_can_sleep()) {				\
> -			usleep_range((W), (W)*2);			\
> +		if ((SLEEP_US) && drm_can_sleep()) {			\
> +			usleep_range((SLEEP_US), (SLEEP_US) * 2);	\
>  		} else {						\
>  			cpu_relax();					\
>  		}							\
> @@ -68,7 +69,7 @@
>  	ret__;								\
>  })
>  
> -#define wait_for(COND, MS)	  	_wait_for((COND), (MS) * 1000, 1000)
> +#define wait_for(COND, MS)	 _wait_for_ms((COND), (MS), 1 * USEC_PER_MSEC)
>  
>  /* If CONFIG_PREEMPT_COUNT is disabled, in_atomic() always reports false. */
>  #if defined(CONFIG_DRM_I915_DEBUG) && defined(CONFIG_PREEMPT_COUNT)
> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> index c3abae4bc596..0ceb2026835e 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -506,9 +506,9 @@ static void hsw_psr_disable(struct intel_dp *intel_dp)
>  			   I915_READ(EDP_PSR_CTL) & ~EDP_PSR_ENABLE);
>  
>  		/* Wait till PSR is idle */
> -		if (_wait_for((I915_READ(EDP_PSR_STATUS_CTL) &
> -			       EDP_PSR_STATUS_STATE_MASK) == 0,
> -			       2 * USEC_PER_SEC, 10 * USEC_PER_MSEC))
> +		if (_wait_for_ms((I915_READ(EDP_PSR_STATUS_CTL) &
> +				  EDP_PSR_STATUS_STATE_MASK) == 0,
> +				 2 * MSEC_PER_SEC, 10 * USEC_PER_MSEC))
>  			DRM_ERROR("Timed out waiting for PSR Idle State\n");
>  
>  		dev_priv->psr.active = false;
> -- 
> 2.5.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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