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From: "Kumar, Mahesh" <mahesh1.kumar@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Kumar@freedesktop.org
Subject: [PATCH 1/7] drm/i915/hsw+: set intel_crtc active once pipe is active
Date: Mon, 29 Aug 2016 18:05:16 +0530	[thread overview]
Message-ID: <20160829123522.9532-2-mahesh1.kumar@intel.com> (raw)
In-Reply-To: <20160829123522.9532-1-mahesh1.kumar@intel.com>

Set the intel_crtc->active flag after pipe/crtc is actually active in
haswell_crtc_enable function.

Signed-off-by: Kumar, Mahesh <mahesh1.kumar@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e4e6141..7258883 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5427,8 +5427,6 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
 
 	intel_color_set_csc(&pipe_config->base);
 
-	intel_crtc->active = true;
-
 	if (intel_crtc->config->has_pch_encoder)
 		intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
 	else
@@ -5475,6 +5473,8 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
 	assert_vblank_disabled(crtc);
 	drm_crtc_vblank_on(crtc);
 
+	intel_crtc->active = true;
+
 	intel_encoders_enable(crtc, pipe_config, old_state);
 
 	if (intel_crtc->config->has_pch_encoder) {
-- 
2.8.3

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  reply	other threads:[~2016-08-29 12:31 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-29 12:35 [PATCH 0/7] Implement New DDB allocation algorithm Kumar, Mahesh
2016-08-29 12:35 ` Kumar, Mahesh [this message]
2016-08-30 19:18   ` [PATCH 1/7] drm/i915/hsw+: set intel_crtc active once pipe is active Zanoni, Paulo R
2016-08-31 10:51   ` Maarten Lankhorst
2016-08-31 14:04     ` Mahesh Kumar
2016-08-29 12:35 ` [PATCH 2/7] drm/i915/skl+: use linetime latency instead of ddb size Kumar, Mahesh
2016-08-29 12:35 ` [PATCH 3/7] drm/i915/skl: pass pipe_wm in skl_compute_(wm_level/plane_wm) functions Kumar, Mahesh
2016-08-29 12:35 ` [PATCH 4/7] drm/i915/skl: New ddb allocation algorithm Kumar, Mahesh
2016-08-31 13:38   ` Maarten Lankhorst
2016-08-31 14:18     ` Mahesh Kumar
2016-08-29 12:35 ` [PATCH 5/7] drm/i915: Decode system memory bandwidth Kumar, Mahesh
2016-08-29 12:35 ` [PATCH] FOR_UPSTREAM [VPG]: drm/i915/skl+: Implement Transition WM Kumar, Mahesh
2016-08-30 19:32   ` Zanoni, Paulo R
2016-08-31 13:47     ` Zanoni, Paulo R
2016-09-02 11:46       ` Mahesh Kumar
2016-09-02 12:21         ` Zanoni, Paulo R
2016-08-29 12:35 ` [PATCH] drm/i915/gen9: WM memory bandwidth related workaround Kumar, Mahesh
2016-09-08 11:26 ` [PATCH v2 0/9] New DDB Algo and WM fixes Kumar, Mahesh
2016-09-08 11:26   ` [PATCH v2 1/9] drm/i915/skl: pass pipe_wm in skl_compute_(wm_level/plane_wm) functions Kumar, Mahesh
2016-09-08 11:26   ` [PATCH v2 2/9] drm/i915/skl+: use linetime latency instead of ddb size Kumar, Mahesh
2016-09-08 11:26   ` [PATCH v2 3/9] drm/i915/skl: New ddb allocation algorithm Kumar, Mahesh
2016-09-08 11:26   ` [PATCH v2 4/9] drm/i915: Decode system memory bandwidth Kumar, Mahesh
2016-09-08 11:26   ` [PATCH v2 5/9] drm/i915/gen9: WM memory bandwidth related workaround Kumar, Mahesh
2016-09-08 11:26   ` [PATCH v2 6/9] drm/i915/skl+: change WM calc to fixed point 16.16 Kumar, Mahesh
2016-09-08 11:26   ` [PATCH v2 7/9] drm/i915/bxt: Enable IPC support Kumar, Mahesh
2016-09-08 11:26   ` [PATCH v2 8/9] drm/i915/bxt: set chicken bit as IPC y-tile WA Kumar, Mahesh
2016-09-08 11:26   ` [PATCH v2 9/9] drm/i915/bxt: Implement Transition WM Kumar, Mahesh
2016-09-08 11:55 ` ✗ Fi.CI.BAT: failure for Implement New DDB allocation algorithm Patchwork

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