From: Manasi Navare <manasi.d.navare@intel.com>
To: "Pandiyan, Dhinakaran" <dhinakaran.pandiyan@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH v2 12/14] drm/i915: Remove the link rate and lane count loop in compute config
Date: Tue, 13 Sep 2016 18:05:28 -0700 [thread overview]
Message-ID: <20160914010528.GA26284@intel.com> (raw)
In-Reply-To: <1473730154.1219.105.camel@dk-H97M-D3H>
On Mon, Sep 12, 2016 at 06:14:00PM -0700, Pandiyan, Dhinakaran wrote:
> On Thu, 2016-09-08 at 13:02 -0700, Manasi Navare wrote:
> > While configuring the pipe during modeset, it should use
> > max clock and max lane count and reduce the bpp until
> > the requested mode rate is less than or equal to
> > available link BW.
> > This is required to pass DP Compliance.
> >
> > v2:
> > * Removed the loop since we use max values of clock
> > and lane count (Dhinakaran Pandiyan)
> >
> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_dp.c | 22 ++++++++--------------
> > 1 file changed, 8 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > index 1378116..60c8857 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -1567,20 +1567,14 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> > for (; bpp >= 6*3; bpp -= 2*3) {
> > mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock,
> > bpp);
> > -
> > - for (clock = min_clock; clock <= max_clock; clock++) {
> > - for (lane_count = min_lane_count;
> > - lane_count <= max_lane_count;
> > - lane_count <<= 1) {
> > -
> > - link_clock = common_rates[clock];
> > - link_avail = intel_dp_max_data_rate(link_clock,
> > - lane_count);
> > -
> > - if (mode_rate <= link_avail) {
> > - goto found;
> > - }
> > - }
> > + clock = max_clock;
> > + lane_count = max_lane_count;
>
> Do we still need lane_count? We can eliminate it if it's always going to
> be max_lane_count.
>
>
This is just to follow the paradigm and use lane count and link rate here
while setting up the pipe config.
> > + link_clock = common_rates[clock];
>
> Same here for link_clock.
>
> > + link_avail = intel_dp_max_data_rate(link_clock,
> > + lane_count);
> > +
> > + if (mode_rate <= link_avail) {
> > + goto found;
>
> Print KMS debug if we cannot satisfy the mode_rate at the max DP link
> rate?
>
Agree, but I am going to add it outside the bpp loop. You should see
a new patch soon.
Manasi
> > }
> > }
> >
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2016-09-14 1:05 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-01 22:08 [PATCH 00/14] Enable Upfront Link Training on DDI platforms Manasi Navare
2016-09-01 22:08 ` [PATCH v2 01/14] drm/i915: Don't pass crtc_state to intel_dp_set_link_params() Manasi Navare
2016-09-01 22:08 ` [PATCH v2 02/14] drm/i915: Remove ddi_pll_sel from intel_crtc_state Manasi Navare
2016-09-01 22:08 ` [PATCH v3 03/14] drm/i915: Split intel_ddi_pre_enable() into DP and HDMI versions Manasi Navare
2016-09-01 22:08 ` [PATCH v2 04/14] drm/i915: Split bxt_ddi_pll_select() Manasi Navare
2016-09-01 22:08 ` [PATCH 05/14] drm/i915: Split skl_get_dpll() Manasi Navare
2016-09-01 22:08 ` [PATCH 06/14] drm/i915: Split hsw_get_dpll() Manasi Navare
2016-09-01 22:08 ` [PATCH v3 07/14] drm/i915/dp: Add a standalone function to obtain shared dpll for HSW/BDW/SKL/BXT Manasi Navare
2016-09-02 20:06 ` Pandiyan, Dhinakaran
2016-09-07 22:08 ` Manasi Navare
2016-09-07 22:47 ` [PATCH v4 7/14] " Manasi Navare
2016-09-01 22:08 ` [PATCH 08/14] drm/i915/dp: Move max. vswing check to it's own function Manasi Navare
2016-09-02 8:05 ` Mika Kahola
2016-09-06 9:58 ` Mika Kahola
2016-09-06 21:25 ` Manasi Navare
2016-09-07 0:13 ` [PATCH v2 8/14] " Manasi Navare
2016-09-07 7:00 ` Mika Kahola
2016-09-07 18:28 ` [PATCH v3 " Manasi Navare
2016-09-08 7:38 ` Mika Kahola
2016-09-13 11:44 ` Jani Nikula
2016-09-01 22:08 ` [PATCH 09/14] drm/dp/i915: Make clock recovery in the link training compliant with DP Spec 1.2 Manasi Navare
2016-09-02 9:16 ` Mika Kahola
2016-09-02 17:55 ` Pandiyan, Dhinakaran
2016-09-07 0:13 ` [PATCH v2 9/14] " Manasi Navare
2016-09-07 7:33 ` Mika Kahola
2016-09-07 18:28 ` [PATCH v3 " Manasi Navare
2016-09-08 8:20 ` Mika Kahola
2016-09-01 22:08 ` [PATCH 10/14] drm/i915: Make DP link training channel equalization DP 1.2 Spec compliant Manasi Navare
2016-09-02 11:20 ` Mika Kahola
2016-09-02 19:05 ` Pandiyan, Dhinakaran
2016-09-07 7:50 ` Mika Kahola
2016-09-13 16:09 ` Rodrigo Vivi
2016-09-01 22:08 ` [PATCH 11/14] drm/i915: Fallback to lower link rate and lane count during link training Manasi Navare
2016-09-02 12:03 ` David Weinehall
2016-09-06 17:34 ` Manasi Navare
2016-09-02 12:49 ` David Weinehall
2016-09-06 17:54 ` Manasi Navare
2016-09-02 13:00 ` Mika Kahola
2016-09-06 18:01 ` Manasi Navare
2016-09-02 19:52 ` Pandiyan, Dhinakaran
2016-09-02 20:01 ` Jim Bride
2016-09-07 0:13 ` [PATCH v2 " Manasi Navare
2016-09-07 9:47 ` Mika Kahola
2016-09-07 16:47 ` Jim Bride
2016-09-07 16:48 ` Manasi Navare
2016-09-07 18:28 ` [PATCH v3 " Manasi Navare
2016-09-08 0:30 ` [PATCH v4 " Manasi Navare
2016-09-08 9:32 ` Mika Kahola
2016-09-09 1:05 ` Rodrigo Vivi
2016-09-09 7:11 ` Jani Nikula
2016-09-09 7:11 ` Jani Nikula
2016-09-09 17:13 ` Manasi Navare
2016-09-09 23:29 ` [PATCH v5 " Manasi Navare
2016-09-01 22:08 ` [PATCH 12/14] drm/i915: Reverse the loop in intel_dp_compute_config Manasi Navare
2016-09-02 13:08 ` Mika Kahola
2016-09-08 14:47 ` Manasi Navare
2016-09-02 20:24 ` Pandiyan, Dhinakaran
2016-09-08 20:02 ` [PATCH v2 12/14] drm/i915: Remove the link rate and lane count loop in compute config Manasi Navare
2016-09-13 1:14 ` Pandiyan, Dhinakaran
2016-09-14 1:05 ` Manasi Navare [this message]
2016-09-01 22:08 ` [PATCH v11 13/14] drm/i915/dp: Enable Upfront link training for typeC DP support on HSW/BDW/SKL/BXT (DDI platforms) Manasi Navare
2016-09-07 0:13 ` [PATCH v12 " Manasi Navare
2016-09-07 18:28 ` [PATCH v13 " Manasi Navare
2016-09-08 12:10 ` Mika Kahola
2016-09-08 15:06 ` Manasi Navare
2016-09-08 17:22 ` [PATCH v14 " Manasi Navare
2016-09-08 20:02 ` [PATCH v15 " Manasi Navare
2016-09-09 7:34 ` Jani Nikula
2016-09-09 23:29 ` [PATCH 13-1/14] drm/i915: Change the placement of some static functions in intel_dp.c Manasi Navare
2016-09-12 23:21 ` Rodrigo Vivi
2016-09-09 23:29 ` [PATCH v16 13-2/14] drm/i915/dp: Enable Upfront link training on HSW/BDW/SKL/BXT Manasi Navare
2016-09-13 0:22 ` Rodrigo Vivi
2016-09-09 7:31 ` [PATCH v14 13/14] drm/i915/dp: Enable Upfront link training for typeC DP support on HSW/BDW/SKL/BXT (DDI platforms) Jani Nikula
2016-09-01 22:08 ` [PATCH 14/14] drm/i915/dp/mst: Add support for upfront link training for DP MST Manasi Navare
2016-09-07 0:13 ` [PATCH v2 " Manasi Navare
2016-09-07 10:53 ` Mika Kahola
2016-09-07 16:40 ` Jim Bride
2016-09-08 10:21 ` Mika Kahola
2016-09-08 11:50 ` Mika Kahola
2016-09-01 22:48 ` ✗ Fi.CI.BAT: failure for Enable upfront link training on DDI platforms (rev3) Patchwork
2016-09-07 0:54 ` ✗ Fi.CI.BAT: warning for Enable upfront link training on DDI platforms (rev8) Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20160914010528.GA26284@intel.com \
--to=manasi.d.navare@intel.com \
--cc=dhinakaran.pandiyan@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).