From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>,
intel-gfx@lists.freedesktop.org,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Subject: Re: [PATCH] drm/i915: Assert we hold the CRTC powerwell for generating vblank interrupts
Date: Mon, 10 Oct 2016 14:56:40 +0300 [thread overview]
Message-ID: <20161010115640.GC4329@intel.com> (raw)
In-Reply-To: <20161010114632.GA16122@nuc-i3427.alporthouse.com>
On Mon, Oct 10, 2016 at 12:46:32PM +0100, Chris Wilson wrote:
> On Mon, Oct 10, 2016 at 02:42:01PM +0300, Ville Syrjälä wrote:
> > On Mon, Oct 10, 2016 at 12:34:54PM +0100, Chris Wilson wrote:
> > > To enable the vblank itself, we need to have an RPM wakeref for the mmio
> > > access, and whilst generating the vblank interrupts we continue to
> > > require the rpm wakeref. The assumption is that the RPM wakeref is held
> > > by the display powerwell held by the active pipe. As this chain was not
> > > obvious to me chasing the drm_wait_vblank ioctl, document it with a WARN
> > > during *_vblank_enable().
> > >
> > > v2: Check the display power well rather than digging inside the atomic
> > > CRTC state.
> > >
> > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> > > ---
> > > drivers/gpu/drm/i915/i915_irq.c | 20 ++++++++++++++++++++
> > > 1 file changed, 20 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> > > index 1e43fe30da11..f0f17055dbb9 100644
> > > --- a/drivers/gpu/drm/i915/i915_irq.c
> > > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > > @@ -2715,6 +2715,14 @@ void i915_handle_error(struct drm_i915_private *dev_priv,
> > > i915_reset_and_wakeup(dev_priv);
> > > }
> > >
> > > +static void assert_pipe_is_awake(struct drm_i915_private *dev_priv,
> > > + enum pipe pipe)
> > > +{
> > > + WARN_ON(IS_ENABLED(CONFIG_DRM_I915_DEBUG) &&
> > > + !intel_display_power_is_enabled(dev_priv,
> > > + POWER_DOMAIN_PIPE(pipe)));
> >
> > Uses a mutex. And having a power well enabled doesn't mean much. It
> > doesn't guarantee that vblanks work.
>
> Impasse. :|
>
> There should be no point in an explicit assert_rpm_wakeref here as the
> register access should catch an error there. Is there no safe way we can
> assert the current state of the CRTC is correct for enabling vblanks?
crtc->active might be the closest thing, if we just ignore any locking.
Though it looks like that has gone a bit mad these days, what with being
set from the .crtc_enable() hooks but getting cleared outside the
.crtc_disable() hooks.
--
Ville Syrjälä
Intel OTC
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next prev parent reply other threads:[~2016-10-10 11:56 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-07 19:49 [PATCH 1/2] drm/i915: Merge duplicate gen4 and vlv/chv enable vblank callbacks Chris Wilson
2016-10-07 19:49 ` [PATCH 2/2] drm/i915: Assert we hold the CRTC powerwell for generating vblank interrupts Chris Wilson
2016-10-10 9:35 ` Maarten Lankhorst
2016-10-10 9:57 ` Chris Wilson
2016-10-10 10:38 ` Maarten Lankhorst
2016-10-10 10:53 ` Chris Wilson
2016-10-10 11:34 ` [PATCH] " Chris Wilson
2016-10-10 11:39 ` Chris Wilson
2016-10-10 11:42 ` Ville Syrjälä
2016-10-10 11:46 ` Chris Wilson
2016-10-10 11:56 ` Ville Syrjälä [this message]
2016-10-11 6:17 ` Maarten Lankhorst
2016-10-11 6:55 ` Ville Syrjälä
2016-10-11 7:45 ` Maarten Lankhorst
2016-10-11 8:32 ` Ville Syrjälä
2016-10-12 5:21 ` Maarten Lankhorst
2016-10-13 14:17 ` Daniel Vetter
2016-10-13 15:06 ` Chris Wilson
2016-10-10 16:50 ` ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915: Merge duplicate gen4 and vlv/chv enable vblank callbacks (rev3) Patchwork
2016-10-13 14:19 ` [PATCH 1/2] drm/i915: Merge duplicate gen4 and vlv/chv enable vblank callbacks Daniel Vetter
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