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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/3] drm/i915: Always flush the dirty CPU cache when pinning the scanout
Date: Tue, 8 Nov 2016 15:45:35 +0200	[thread overview]
Message-ID: <20161108134535.GI4617@intel.com> (raw)
In-Reply-To: <20161108114238.GK18604@nuc-i3427.alporthouse.com>

On Tue, Nov 08, 2016 at 11:42:38AM +0000, Chris Wilson wrote:
> On Tue, Nov 08, 2016 at 01:33:41PM +0200, Ville Syrjälä wrote:
> > On Sun, Nov 06, 2016 at 01:00:00PM +0000, Chris Wilson wrote:
> > > -	i915_gem_object_flush_cpu_write_domain(obj);
> > > +	if (obj->cache_dirty || obj->base.write_domain == I915_GEM_DOMAIN_CPU)
> > > +		i915_gem_clflush_object(obj, true);
> > > +	intel_fb_obj_flush(obj, false, ORIGIN_CPU);
> > 
> > So one slight change in behaviour is that we won't clear the write domain
> > here, but that's fine since we'll clear it below anyway.
> > 
> > The other is that we now call intel_fb_obj_flush() unconditionally,
> > whereas before we only called if when the bo was in the CPU write
> > domain. Hmm. Should we keep it conditional?
> 
> I was thinking that we should call it in the case we deferred clflush,
> and I was wanting to make the preflip path closer to dirtyfb. Since to
> me they both demark the frame boundary and the preparatory flushing
> should be more or less the same.

All right. Seems sane enough to me.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> 
> > >  	old_write_domain = obj->base.write_domain;
> > >  	old_read_domains = obj->base.read_domains;
> > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > > index 92ab01f33208..47233b242c99 100644
> > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > @@ -15698,6 +15698,8 @@ static int intel_user_framebuffer_dirty(struct drm_framebuffer *fb,
> > >  	struct drm_i915_gem_object *obj = intel_fb->obj;
> > >  
> > >  	mutex_lock(&dev->struct_mutex);
> > > +	if (obj->pin_display && obj->cache_dirty)
> > > +		i915_gem_clflush_object(obj, true);
> > >  	intel_fb_obj_flush(obj, false, ORIGIN_DIRTYFB);
> > >  	mutex_unlock(&dev->struct_mutex);
> 
> -- 
> Chris Wilson, Intel Open Source Technology Centre

-- 
Ville Syrjälä
Intel OTC
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  reply	other threads:[~2016-11-08 13:45 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-06 12:59 [PATCH 1/3] drm/i915: Remove chipset flush after cache flush Chris Wilson
2016-11-06 13:00 ` [PATCH 2/3] drm/i915: Always flush the dirty CPU cache when pinning the scanout Chris Wilson
2016-11-08 11:33   ` Ville Syrjälä
2016-11-08 11:42     ` Chris Wilson
2016-11-08 13:45       ` Ville Syrjälä [this message]
2016-11-06 13:00 ` [PATCH 3/3] drm/i915: Mark all skipped clflushes as leaving the CPU cache dirty Chris Wilson
2016-11-06 13:45 ` ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Remove chipset flush after cache flush Patchwork
2016-11-07 12:01 ` [PATCH 1/3] " Joonas Lahtinen
2016-11-07 12:10   ` Chris Wilson
2016-11-07 16:16     ` Joonas Lahtinen
2016-11-08 11:08       ` Chris Wilson

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