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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [CI 09/10] drm/i915: Store the execution priority on the context
Date: Mon, 14 Nov 2016 20:41:04 +0000	[thread overview]
Message-ID: <20161114204105.29171-9-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20161114204105.29171-1-chris@chris-wilson.co.uk>

In order to support userspace defining different levels of importance to
different contexts, and in particular the preferred order of execution,
store a priority value on each context. By default, the kernel's
context, which is used for idling and other background tasks, is given
minimum priority (i.e. all user contexts will execute before the kernel).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         | 1 +
 drivers/gpu/drm/i915/i915_gem_context.c | 1 +
 drivers/gpu/drm/i915/i915_gem_request.c | 2 +-
 3 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6aad69fe8ccf..fa8ee8738e7c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -936,6 +936,7 @@ struct i915_gem_context {
 	/* Unique identifier for this context, used by the hw for tracking */
 	unsigned int hw_id;
 	u32 user_handle;
+	int priority; /* greater priorities are serviced first */
 
 	u32 ggtt_alignment;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 6dd475735f0a..1f94b8d6d83d 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -476,6 +476,7 @@ int i915_gem_context_init(struct drm_device *dev)
 		return PTR_ERR(ctx);
 	}
 
+	ctx->priority = I915_PRIORITY_MIN; /* lowest priority; idle task */
 	dev_priv->kernel_context = ctx;
 
 	DRM_DEBUG_DRIVER("%s context support initialized\n",
diff --git a/drivers/gpu/drm/i915/i915_gem_request.c b/drivers/gpu/drm/i915/i915_gem_request.c
index 13574a1e29b1..b9b5253cf3cd 100644
--- a/drivers/gpu/drm/i915/i915_gem_request.c
+++ b/drivers/gpu/drm/i915/i915_gem_request.c
@@ -867,7 +867,7 @@ void __i915_add_request(struct drm_i915_gem_request *request, bool flush_caches)
 	 * run at the earliest possible convenience.
 	 */
 	if (engine->schedule)
-		engine->schedule(request, 0);
+		engine->schedule(request, request->ctx->priority);
 
 	local_bh_disable();
 	i915_sw_fence_commit(&request->submit);
-- 
2.10.2

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  parent reply	other threads:[~2016-11-14 20:41 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-14 20:40 [CI 01/10] drm/i915: Give each sw_fence its own lockclass Chris Wilson
2016-11-14 20:40 ` [CI 02/10] drm/i915: Create distinct lockclasses for execution vs user timelines Chris Wilson
2016-11-14 20:40 ` [CI 03/10] drm/i915: Split request submit/execute phase into two Chris Wilson
2016-11-14 20:40 ` [CI 04/10] drm/i915: Defer transfer onto execution timeline to actual hw submission Chris Wilson
2016-11-14 20:41 ` [CI 05/10] drm/i915: Remove engine->execlist_lock Chris Wilson
2016-11-14 20:41 ` [CI 06/10] drm/i915/scheduler: Signal the arrival of a new request Chris Wilson
2016-11-14 20:41 ` [CI 07/10] drm/i915/scheduler: Record all dependencies upon request construction Chris Wilson
2016-11-14 20:41 ` [CI 08/10] drm/i915/scheduler: Execute requests in order of priorities Chris Wilson
2016-11-16 11:22   ` Jani Nikula
2016-11-14 20:41 ` Chris Wilson [this message]
2016-11-14 20:41 ` [CI 10/10] drm/i915/scheduler: Boost priorities for flips Chris Wilson
2016-11-14 21:16 ` ✗ Fi.CI.BAT: warning for series starting with [CI,01/10] drm/i915: Give each sw_fence its own lockclass Patchwork
2016-11-14 21:21   ` Chris Wilson
2016-11-15  6:47     ` Saarinen, Jani

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