From: Mahesh Kumar <mahesh1.kumar@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: paulo.r.zanoni@intel.com, maarten.lankhorst@intel.com
Subject: [PATCH v5 1/8] drm/i915/skl: Add variables to check x_tile and y_tile
Date: Fri, 18 Nov 2016 20:39:27 +0530 [thread overview]
Message-ID: <20161118150934.29851-2-mahesh1.kumar@intel.com> (raw)
In-Reply-To: <20161118150934.29851-1-mahesh1.kumar@intel.com>
This patch adds variable to check for X_tiled & y_tiled planes, instead
of always checking against framebuffer-modifiers.
Changes:
- Created separate patch as per Paulo's comment
- Added x_tiled variable as well
Changes since V2:
- Incorporate Paulo's comments
- Rebase
Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 22 ++++++++++++----------
1 file changed, 12 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index e54708d..8908736 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3592,13 +3592,18 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
struct intel_atomic_state *state =
to_intel_atomic_state(cstate->base.state);
bool apply_memory_bw_wa = skl_needs_memory_bw_wa(state);
+ bool y_tiled, x_tiled;
if (latency == 0 || !cstate->base.active || !intel_pstate->base.visible) {
*enabled = false;
return 0;
}
- if (apply_memory_bw_wa && fb->modifier == I915_FORMAT_MOD_X_TILED)
+ y_tiled = fb->modifier == I915_FORMAT_MOD_Y_TILED ||
+ fb->modifier == I915_FORMAT_MOD_Yf_TILED;
+ x_tiled = fb->modifier == I915_FORMAT_MOD_X_TILED;
+
+ if (apply_memory_bw_wa && x_tiled)
latency += 15;
width = drm_rect_width(&intel_pstate->base.src) >> 16;
@@ -3637,16 +3642,15 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
y_min_scanlines *= 2;
plane_bytes_per_line = width * cpp;
- if (fb->modifier == I915_FORMAT_MOD_Y_TILED ||
- fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
+ if (y_tiled) {
plane_blocks_per_line =
DIV_ROUND_UP(plane_bytes_per_line * y_min_scanlines, 512);
plane_blocks_per_line /= y_min_scanlines;
- } else if (fb->modifier == DRM_FORMAT_MOD_NONE) {
+ } else if (x_tiled) {
+ plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512);
+ } else {
plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512)
+ 1;
- } else {
- plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512);
}
method1 = skl_wm_method1(plane_pixel_rate, cpp, latency);
@@ -3657,8 +3661,7 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
y_tile_minimum = plane_blocks_per_line * y_min_scanlines;
- if (fb->modifier == I915_FORMAT_MOD_Y_TILED ||
- fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
+ if (y_tiled) {
selected_result = max(method2, y_tile_minimum);
} else {
if ((cpp * cstate->base.adjusted_mode.crtc_htotal / 512 < 1) &&
@@ -3674,8 +3677,7 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
res_lines = DIV_ROUND_UP(selected_result, plane_blocks_per_line);
if (level >= 1 && level <= 7) {
- if (fb->modifier == I915_FORMAT_MOD_Y_TILED ||
- fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
+ if (y_tiled) {
res_blocks += y_tile_minimum;
res_lines += y_min_scanlines;
} else {
--
2.10.1
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next prev parent reply other threads:[~2016-11-18 15:09 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-18 15:09 [PATCH v5 0/8] GEN-9 Arbitrated Bandwidth WM WA's & IPC Mahesh Kumar
2016-11-18 15:09 ` Mahesh Kumar [this message]
2016-11-21 16:51 ` [PATCH v5 1/8] drm/i915/skl: Add variables to check x_tile and y_tile Paulo Zanoni
2016-11-18 15:09 ` [PATCH v5 2/8] drm/i915/bxt: IPC WA for Broxton Mahesh Kumar
2016-11-21 17:23 ` Paulo Zanoni
2016-11-18 15:09 ` [PATCH v5 3/8] drm/i915/kbl: IPC workaround for kabylake Mahesh Kumar
2016-11-21 17:38 ` Paulo Zanoni
2016-11-18 15:09 ` [PATCH v5 4/8] drm/i915/bxt: Enable IPC support Mahesh Kumar
2016-11-21 18:46 ` Paulo Zanoni
2016-11-22 13:35 ` Mahesh Kumar
2016-11-22 14:45 ` Paulo Zanoni
2016-11-23 10:25 ` Mahesh Kumar
2016-12-02 11:51 ` Mahesh Kumar
2016-11-18 15:09 ` [PATCH v5 5/8] drm/i915/skl+: change WM calc to fixed point 16.16 Mahesh Kumar
2016-11-22 12:42 ` Paulo Zanoni
2016-11-22 14:04 ` Mahesh Kumar
2016-11-18 15:09 ` [PATCH v5 6/8] drm/i915: Add intel_atomic_get_existing_crtc_state function Mahesh Kumar
2016-11-21 19:51 ` Paulo Zanoni
2016-11-18 15:09 ` [PATCH v5 7/8] drm/i915: Decode system memory bandwidth Mahesh Kumar
2016-11-18 15:09 ` [PATCH v5 8/8] drm/i915/gen9: WM memory bandwidth related workaround Mahesh Kumar
2016-11-18 16:01 ` ✗ Fi.CI.BAT: failure for GEN-9 Arbitrated Bandwidth WM WA's & IPC Patchwork
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