[PATCH] drm/i915: Initialize dev_priv->atomic_cdclk_freq at init time

[PATCH] drm/i915: Initialize dev_priv->atomic_cdclk_freq at init time

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Looks like we're only initializing dev_priv->atomic_cdclk_freq
at resume and commit times, not at init time. Let's do that as
well.

We're now hitting the 'WARN_ON(intel_state->cdclk == 0)' in
hsw_compute_linetime_wm() on account of populating
intel_state->cdclk from dev_priv->atomic_cdclk_freq.
Previously we were mispopulating intel_state->cdclk with
dev_priv->cdclk_freq which always had a proper value at init
time and hence the WARN_ON() didn't trigger.

Cc: stable@vger.kernel.org
Cc: Matthew Auld <matthew.auld@intel.com>
Reported-by: Matthew Auld <matthew.auld@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98902
Fixes: e0ca7a6be38c ("drm/i915: Fix cdclk vs. dev_cdclk mess when not recomputing things")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 17a6b59f6678..8ce536a767ad 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -16516,6 +16516,7 @@ int intel_modeset_init(struct drm_device *dev)
 
 	intel_update_czclk(dev_priv);
 	intel_update_cdclk(dev_priv);
+	dev_priv->atomic_cdclk_freq = dev_priv->cdclk_freq;
 
 	intel_shared_dpll_init(dev);
 
-- 
2.7.4

Re: [PATCH] drm/i915: Initialize dev_priv->atomic_cdclk_freq at init time

[Matthew Auld]

On 29 November 2016 at 14:13,  <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Looks like we're only initializing dev_priv->atomic_cdclk_freq
> at resume and commit times, not at init time. Let's do that as
> well.
>
> We're now hitting the 'WARN_ON(intel_state->cdclk == 0)' in
> hsw_compute_linetime_wm() on account of populating
> intel_state->cdclk from dev_priv->atomic_cdclk_freq.
> Previously we were mispopulating intel_state->cdclk with
> dev_priv->cdclk_freq which always had a proper value at init
> time and hence the WARN_ON() didn't trigger.
>
> Cc: stable@vger.kernel.org
> Cc: Matthew Auld <matthew.auld@intel.com>
> Reported-by: Matthew Auld <matthew.auld@intel.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98902
> Fixes: e0ca7a6be38c ("drm/i915: Fix cdclk vs. dev_cdclk mess when not recomputing things")
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Tested-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
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✓ Fi.CI.BAT: success for drm/i915: Initialize dev_priv->atomic_cdclk_freq at init time

[Patchwork]

== Series Details ==

Series: drm/i915: Initialize dev_priv->atomic_cdclk_freq at init time
URL   : https://patchwork.freedesktop.org/series/16100/
State : success

== Summary ==

Series 16100v1 drm/i915: Initialize dev_priv->atomic_cdclk_freq at init time
https://patchwork.freedesktop.org/api/1.0/series/16100/revisions/1/mbox/


fi-bdw-5557u     total:245  pass:230  dwarn:0   dfail:0   fail:0   skip:15 
fi-bsw-n3050     total:245  pass:205  dwarn:0   dfail:0   fail:0   skip:40 
fi-bxt-t5700     total:245  pass:217  dwarn:0   dfail:0   fail:0   skip:28 
fi-byt-j1900     total:245  pass:217  dwarn:0   dfail:0   fail:0   skip:28 
fi-byt-n2820     total:245  pass:213  dwarn:0   dfail:0   fail:0   skip:32 
fi-hsw-4770      total:245  pass:225  dwarn:0   dfail:0   fail:0   skip:20 
fi-hsw-4770r     total:245  pass:225  dwarn:0   dfail:0   fail:0   skip:20 
fi-ilk-650       total:245  pass:192  dwarn:0   dfail:0   fail:0   skip:53 
fi-ivb-3520m     total:245  pass:223  dwarn:0   dfail:0   fail:0   skip:22 
fi-ivb-3770      total:245  pass:223  dwarn:0   dfail:0   fail:0   skip:22 
fi-kbl-7500u     total:245  pass:223  dwarn:0   dfail:0   fail:0   skip:22 
fi-skl-6260u     total:245  pass:231  dwarn:0   dfail:0   fail:0   skip:14 
fi-skl-6700hq    total:245  pass:224  dwarn:0   dfail:0   fail:0   skip:21 
fi-skl-6700k     total:245  pass:223  dwarn:1   dfail:0   fail:0   skip:21 
fi-skl-6770hq    total:245  pass:231  dwarn:0   dfail:0   fail:0   skip:14 
fi-snb-2520m     total:245  pass:213  dwarn:0   dfail:0   fail:0   skip:32 
fi-snb-2600      total:245  pass:212  dwarn:0   dfail:0   fail:0   skip:33 

ccba3c78ee8dd04506b9a473f37450e7707c34da drm-tip: 2016y-11m-29d-15h-56m-34s UTC integration manifest
1df0705 drm/i915: Initialize dev_priv->atomic_cdclk_freq at init time

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3141/
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Re: [PATCH] drm/i915: Initialize dev_priv->atomic_cdclk_freq at init time

[Ville Syrjälä]

On Tue, Nov 29, 2016 at 02:40:45PM +0000, Matthew Auld wrote:
> On 29 November 2016 at 14:13,  <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Looks like we're only initializing dev_priv->atomic_cdclk_freq
> > at resume and commit times, not at init time. Let's do that as
> > well.
> >
> > We're now hitting the 'WARN_ON(intel_state->cdclk == 0)' in
> > hsw_compute_linetime_wm() on account of populating
> > intel_state->cdclk from dev_priv->atomic_cdclk_freq.
> > Previously we were mispopulating intel_state->cdclk with
> > dev_priv->cdclk_freq which always had a proper value at init
> > time and hence the WARN_ON() didn't trigger.
> >
> > Cc: stable@vger.kernel.org
> > Cc: Matthew Auld <matthew.auld@intel.com>
> > Reported-by: Matthew Auld <matthew.auld@intel.com>
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98902
> > Fixes: e0ca7a6be38c ("drm/i915: Fix cdclk vs. dev_cdclk mess when not recomputing things")
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Tested-by: Matthew Auld <matthew.auld@intel.com>
> Reviewed-by: Matthew Auld <matthew.auld@intel.com>

Pushed to dinq. Thanks for the testing and review.

-- 
Ville Syrjälä
Intel OTC
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