From: Patchwork <patchwork@emeril.freedesktop.org>
To: Madhav Chauhan <madhav.chauhan@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✓ Fi.CI.BAT: success for GLK MIPI DSI VIDEO MODE PATCHES
Date: Thu, 08 Dec 2016 09:22:50 -0000 [thread overview]
Message-ID: <20161208092250.7905.34205@emeril.freedesktop.org> (raw)
In-Reply-To: <1481187003-15271-1-git-send-email-madhav.chauhan@intel.com>
== Series Details ==
Series: GLK MIPI DSI VIDEO MODE PATCHES
URL : https://patchwork.freedesktop.org/series/16542/
State : success
== Summary ==
Series 16542v1 GLK MIPI DSI VIDEO MODE PATCHES
https://patchwork.freedesktop.org/api/1.0/series/16542/revisions/1/mbox/
fi-bdw-5557u total:247 pass:219 dwarn:0 dfail:0 fail:0 skip:28
fi-bsw-n3050 total:247 pass:195 dwarn:0 dfail:0 fail:0 skip:52
fi-bxt-t5700 total:247 pass:206 dwarn:0 dfail:0 fail:0 skip:41
fi-byt-j1900 total:247 pass:206 dwarn:0 dfail:0 fail:0 skip:41
fi-byt-n2820 total:247 pass:202 dwarn:0 dfail:0 fail:0 skip:45
fi-hsw-4770 total:247 pass:214 dwarn:0 dfail:0 fail:0 skip:33
fi-hsw-4770r total:247 pass:214 dwarn:0 dfail:0 fail:0 skip:33
fi-ilk-650 total:247 pass:181 dwarn:0 dfail:0 fail:0 skip:66
fi-ivb-3520m total:247 pass:213 dwarn:0 dfail:0 fail:0 skip:34
fi-ivb-3770 total:247 pass:212 dwarn:0 dfail:0 fail:0 skip:35
fi-kbl-7500u total:247 pass:212 dwarn:0 dfail:0 fail:0 skip:35
fi-skl-6260u total:247 pass:220 dwarn:0 dfail:0 fail:0 skip:27
fi-skl-6700hq total:247 pass:214 dwarn:0 dfail:0 fail:0 skip:33
fi-skl-6700k total:247 pass:210 dwarn:3 dfail:0 fail:0 skip:34
fi-skl-6770hq total:247 pass:220 dwarn:0 dfail:0 fail:0 skip:27
fi-snb-2520m total:247 pass:202 dwarn:0 dfail:0 fail:0 skip:45
fi-snb-2600 total:247 pass:201 dwarn:0 dfail:0 fail:0 skip:46
ffcd96e45b3b3e4ca57d4879405d02b7b1b58946 drm-tip: 2016y-12m-07d-21h-45m-40s UTC integration manifest
1dc936f drm/915: Parsing the missed out DTD fields from the VBT
d8e70e0 drm/i915/glk: Program dphy param reg for GLK
aef354d drm/i915/glk: Program txesc clock divider for GLK
e1142a4 drm/i915/glk: Program MIPI_CLOCK_CTRL only for BXT
6d35420 drm/i915/glk: Add DSI PLL divider range for glk
f8c63e3 drm/i915: Set the Z inversion overlap field
a5f966d drm/i915/glk: Add MIPIIO Enable/disable sequence
e2032f6 drm/i915/glk: Program new MIPI DSI PHY registers for GLK
7672e79 drm/i915/glk: Add new bit fields in MIPI CTRL register
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3231/
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prev parent reply other threads:[~2016-12-08 9:22 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-08 8:49 [GLK MIPI DSI V1 0/9] GLK MIPI DSI VIDEO MODE PATCHES Madhav Chauhan
2016-12-08 8:49 ` [GLK MIPI DSI V1 1/9] drm/i915/glk: Add new bit fields in MIPI CTRL register Madhav Chauhan
2016-12-13 11:36 ` Jani Nikula
2016-12-14 11:02 ` Chauhan, Madhav
2016-12-14 11:46 ` Jani Nikula
2016-12-14 12:20 ` Chauhan, Madhav
2016-12-08 8:49 ` [GLK MIPI DSI V1 2/9] drm/i915/glk: Program new MIPI DSI PHY registers for GLK Madhav Chauhan
2016-12-08 8:49 ` [GLK MIPI DSI V1 3/9] drm/i915/glk: Add MIPIIO Enable/disable sequence Madhav Chauhan
2016-12-08 8:49 ` [GLK MIPI DSI V1 4/9] drm/i915: Set the Z inversion overlap field Madhav Chauhan
2016-12-08 8:49 ` [GLK MIPI DSI V1 5/9] drm/i915/glk: Add DSI PLL divider range for glk Madhav Chauhan
2016-12-08 8:50 ` [GLK MIPI DSI V1 6/9] drm/i915/glk: Program MIPI_CLOCK_CTRL only for BXT Madhav Chauhan
2016-12-08 8:50 ` [GLK MIPI DSI V1 7/9] drm/i915/glk: Program txesc clock divider for GLK Madhav Chauhan
2016-12-08 8:50 ` [GLK MIPI DSI V1 8/9] drm/i915/glk: Program dphy param reg " Madhav Chauhan
2016-12-08 8:50 ` [GLK MIPI DSI V1 9/9] drm/915: Parsing the missed out DTD fields from the VBT Madhav Chauhan
2016-12-08 9:22 ` Patchwork [this message]
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