[PATCH] drm/i915/psr: report psr2 hw enabled from psr2_ctl

[PATCH] drm/i915/psr: report psr2 hw enabled from psr2_ctl

[vathsala nagaraju]

For PSR2 , as per spec, PSR2_CTL bit 31 to be set.
for psr1, bit 31 in SRD_CTL to be set. Reporting
"HW Enabled & Active bit" status for psr2 from SRD_CTL
gives  wrong status.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jim Bride <jim.bride@linux.intel.com>
Signed-off-by: vathsala nagaraju <vathsala.nagaraju@intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index a746130..54e196d 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2567,9 +2567,12 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
 	seq_printf(m, "Re-enable work scheduled: %s\n",
 		   yesno(work_busy(&dev_priv->psr.work.work)));
 
-	if (HAS_DDI(dev_priv))
-		enabled = I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE;
-	else {
+	if (HAS_DDI(dev_priv)) {
+		if (dev_priv->psr.psr2_support)
+			enabled = I915_READ(EDP_PSR2_CTL) & EDP_PSR2_ENABLE;
+		else
+			enabled = I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE;
+	} else {
 		for_each_pipe(dev_priv, pipe) {
 			enum transcoder cpu_transcoder =
 				intel_pipe_to_cpu_transcoder(dev_priv, pipe);
-- 
1.9.1

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✗ Fi.CI.BAT: warning for drm/i915/psr: report psr2 hw enabled from psr2_ctl

[Patchwork]

== Series Details ==

Series: drm/i915/psr: report psr2 hw enabled from psr2_ctl
URL   : https://patchwork.freedesktop.org/series/16628/
State : warning

== Summary ==

Series 16628v1 drm/i915/psr: report psr2 hw enabled from psr2_ctl
https://patchwork.freedesktop.org/api/1.0/series/16628/revisions/1/mbox/

Test drv_module_reload:
        Subgroup basic-reload-inject:
                pass       -> DMESG-WARN (fi-ilk-650)

fi-bdw-5557u     total:247  pass:233  dwarn:0   dfail:0   fail:0   skip:14 
fi-bsw-n3050     total:247  pass:208  dwarn:0   dfail:0   fail:0   skip:39 
fi-byt-j1900     total:247  pass:220  dwarn:0   dfail:0   fail:0   skip:27 
fi-byt-n2820     total:247  pass:216  dwarn:0   dfail:0   fail:0   skip:31 
fi-hsw-4770      total:247  pass:228  dwarn:0   dfail:0   fail:0   skip:19 
fi-hsw-4770r     total:247  pass:228  dwarn:0   dfail:0   fail:0   skip:19 
fi-ilk-650       total:247  pass:194  dwarn:1   dfail:0   fail:0   skip:52 
fi-ivb-3520m     total:247  pass:226  dwarn:0   dfail:0   fail:0   skip:21 
fi-ivb-3770      total:247  pass:226  dwarn:0   dfail:0   fail:0   skip:21 
fi-kbl-7500u     total:247  pass:226  dwarn:0   dfail:0   fail:0   skip:21 
fi-skl-6260u     total:247  pass:234  dwarn:0   dfail:0   fail:0   skip:13 
fi-skl-6700hq    total:247  pass:227  dwarn:0   dfail:0   fail:0   skip:20 
fi-skl-6700k     total:247  pass:224  dwarn:3   dfail:0   fail:0   skip:20 
fi-skl-6770hq    total:247  pass:234  dwarn:0   dfail:0   fail:0   skip:13 
fi-snb-2520m     total:247  pass:216  dwarn:0   dfail:0   fail:0   skip:31 
fi-snb-2600      total:247  pass:215  dwarn:0   dfail:0   fail:0   skip:32 

de43f4e755c6bf50ad53b4ccacedf9850f42eda4 drm-tip: 2016y-12m-09d-09h-01m-58s UTC integration manifest
09b16b9 drm/i915/psr: report psr2 hw enabled from psr2_ctl

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3256/
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Re: [PATCH] drm/i915/psr: report psr2 hw enabled from psr2_ctl

[Rodrigo Vivi]

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

On Fri, Dec 09, 2016 at 11:42:09PM +0530, vathsala nagaraju wrote:
> For PSR2 , as per spec, PSR2_CTL bit 31 to be set.
> for psr1, bit 31 in SRD_CTL to be set. Reporting
> "HW Enabled & Active bit" status for psr2 from SRD_CTL
> gives  wrong status.
> 
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Jim Bride <jim.bride@linux.intel.com>
> Signed-off-by: vathsala nagaraju <vathsala.nagaraju@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index a746130..54e196d 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2567,9 +2567,12 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
>  	seq_printf(m, "Re-enable work scheduled: %s\n",
>  		   yesno(work_busy(&dev_priv->psr.work.work)));
>  
> -	if (HAS_DDI(dev_priv))
> -		enabled = I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE;
> -	else {
> +	if (HAS_DDI(dev_priv)) {
> +		if (dev_priv->psr.psr2_support)
> +			enabled = I915_READ(EDP_PSR2_CTL) & EDP_PSR2_ENABLE;
> +		else
> +			enabled = I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE;
> +	} else {
>  		for_each_pipe(dev_priv, pipe) {
>  			enum transcoder cpu_transcoder =
>  				intel_pipe_to_cpu_transcoder(dev_priv, pipe);
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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Re: [PATCH] drm/i915/psr: report psr2 hw enabled from psr2_ctl

[Rodrigo Vivi]

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merged to dinq, thanks for the patch.

On Fri, Dec 9, 2016 at 4:39 PM Rodrigo Vivi <rodrigo.vivi@gmail.com> wrote:

>
>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> On Fri, Dec 09, 2016 at 11:42:09PM +0530, vathsala nagaraju wrote:
> > For PSR2 , as per spec, PSR2_CTL bit 31 to be set.
> > for psr1, bit 31 in SRD_CTL to be set. Reporting
> > "HW Enabled & Active bit" status for psr2 from SRD_CTL
> > gives  wrong status.
> >
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Cc: Jim Bride <jim.bride@linux.intel.com>
> > Signed-off-by: vathsala nagaraju <vathsala.nagaraju@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_debugfs.c | 9 ++++++---
> >  1 file changed, 6 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> b/drivers/gpu/drm/i915/i915_debugfs.c
> > index a746130..54e196d 100644
> > --- a/drivers/gpu/drm/i915/i915_debugfs.c
> > +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> > @@ -2567,9 +2567,12 @@ static int i915_edp_psr_status(struct seq_file
> *m, void *data)
> >       seq_printf(m, "Re-enable work scheduled: %s\n",
> >                  yesno(work_busy(&dev_priv->psr.work.work)));
> >
> > -     if (HAS_DDI(dev_priv))
> > -             enabled = I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE;
> > -     else {
> > +     if (HAS_DDI(dev_priv)) {
> > +             if (dev_priv->psr.psr2_support)
> > +                     enabled = I915_READ(EDP_PSR2_CTL) &
> EDP_PSR2_ENABLE;
> > +             else
> > +                     enabled = I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE;
> > +     } else {
> >               for_each_pipe(dev_priv, pipe) {
> >                       enum transcoder cpu_transcoder =
> >                               intel_pipe_to_cpu_transcoder(dev_priv,
> pipe);
> > --
> > 1.9.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>

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Re: [PATCH] drm/i915/psr: report psr2 hw enabled from psr2_ctl

[Jim Bride]

On Fri, Dec 09, 2016 at 11:42:09PM +0530, vathsala nagaraju wrote:
> For PSR2 , as per spec, PSR2_CTL bit 31 to be set.
> for psr1, bit 31 in SRD_CTL to be set. Reporting
> "HW Enabled & Active bit" status for psr2 from SRD_CTL
> gives  wrong status.
> 
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Jim Bride <jim.bride@linux.intel.com>
> Signed-off-by: vathsala nagaraju <vathsala.nagaraju@intel.com>

Reviewed-by: Jim Bride <jim.bride@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index a746130..54e196d 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2567,9 +2567,12 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
>  	seq_printf(m, "Re-enable work scheduled: %s\n",
>  		   yesno(work_busy(&dev_priv->psr.work.work)));
>  
> -	if (HAS_DDI(dev_priv))
> -		enabled = I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE;
> -	else {
> +	if (HAS_DDI(dev_priv)) {
> +		if (dev_priv->psr.psr2_support)
> +			enabled = I915_READ(EDP_PSR2_CTL) & EDP_PSR2_ENABLE;
> +		else
> +			enabled = I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE;
> +	} else {
>  		for_each_pipe(dev_priv, pipe) {
>  			enum transcoder cpu_transcoder =
>  				intel_pipe_to_cpu_transcoder(dev_priv, pipe);
> -- 
> 1.9.1
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