From: Jim Bride <jim.bride@linux.intel.com>
To: vathsala nagaraju <vathsala.nagaraju@intel.com>
Cc: intel-gfx@lists.freedesktop.org, Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH] drm/i915/psr: fix blank screen issue for psr2
Date: Thu, 15 Dec 2016 08:08:30 -0800 [thread overview]
Message-ID: <20161215160830.GB26484@shiv> (raw)
In-Reply-To: <1481729564-4974-1-git-send-email-vathsala.nagaraju@intel.com>
On Wed, Dec 14, 2016 at 09:02:44PM +0530, vathsala nagaraju wrote:
> when psr2 is enabled, psr idle condition is taken
> from psr1 register(SRD_STATUS) instead of psr2_status
> register, resulting in looping and blank screen.
> code changed to lookup from psr2_status and
> psr2_ctl instead of srd_status and srd_ctl for
> psr2 scenario.
>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Jim Bride <jim.bride@linux.intel.com>
> Signed-off-by: vathsala nagaraju <vathsala.nagaraju@intel.com>
Reviewed-by: Jim Bride <jim.bride@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 4 ++
> drivers/gpu/drm/i915/intel_psr.c | 79 +++++++++++++++++++++++++++++-----------
> 2 files changed, 61 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 90685d2..2890bc6 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3611,6 +3611,10 @@ enum {
> #define EDP_PSR2_FRAME_BEFORE_SU_MASK (0xf<<4)
> #define EDP_PSR2_IDLE_MASK 0xf
>
> +#define EDP_PSR2_STATUS_CTL _MMIO(0x6f940)
> +#define EDP_PSR2_STATUS_STATE_MASK (0xf<<28)
> +#define EDP_PSR2_STATUS_STATE_IDLE 0
> +
> /* VGA port control */
> #define ADPA _MMIO(0x61100)
> #define PCH_ADPA _MMIO(0xe1100)
> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> index d5f8d03..c6bc5dd 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -397,7 +397,10 @@ static void intel_psr_activate(struct intel_dp *intel_dp)
> struct drm_device *dev = intel_dig_port->base.base.dev;
> struct drm_i915_private *dev_priv = to_i915(dev);
>
> - WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE);
> + if (dev_priv->psr.psr2_support)
> + WARN_ON(I915_READ(EDP_PSR2_CTL) & EDP_PSR2_ENABLE);
> + else
> + WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE);
> WARN_ON(dev_priv->psr.active);
> lockdep_assert_held(&dev_priv->psr.lock);
>
> @@ -544,20 +547,37 @@ static void hsw_psr_disable(struct intel_dp *intel_dp)
> struct drm_i915_private *dev_priv = to_i915(dev);
>
> if (dev_priv->psr.active) {
> - I915_WRITE(EDP_PSR_CTL,
> - I915_READ(EDP_PSR_CTL) & ~EDP_PSR_ENABLE);
> + if (dev_priv->psr.psr2_support)
> + I915_WRITE(EDP_PSR2_CTL,
> + I915_READ(EDP_PSR2_CTL) &
> + ~(EDP_PSR2_ENABLE |
> + EDP_SU_TRACK_ENABLE));
> + else
> + I915_WRITE(EDP_PSR_CTL,
> + I915_READ(EDP_PSR_CTL) & ~EDP_PSR_ENABLE);
>
> /* Wait till PSR is idle */
> - if (intel_wait_for_register(dev_priv,
> - EDP_PSR_STATUS_CTL,
> - EDP_PSR_STATUS_STATE_MASK,
> - 0,
> - 2000))
> + if (dev_priv->psr.psr2_support) {
> + if (intel_wait_for_register(dev_priv,
> + EDP_PSR2_STATUS_CTL,
> + EDP_PSR2_STATUS_STATE_MASK,
> + 0,
> + 2000))
> + DRM_ERROR("Timed out waiting for PSR2 Idle State\n");
> + } else {
> + if (intel_wait_for_register(dev_priv,
> + EDP_PSR_STATUS_CTL,
> + EDP_PSR_STATUS_STATE_MASK,
> + 0,
> + 2000))
> DRM_ERROR("Timed out waiting for PSR Idle State\n");
> -
> + }
> dev_priv->psr.active = false;
> } else {
> - WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE);
> + if (dev_priv->psr.psr2_support)
> + WARN_ON(I915_READ(EDP_PSR2_CTL) & EDP_PSR2_ENABLE);
> + else
> + WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE);
> }
> }
>
> @@ -608,13 +628,24 @@ static void intel_psr_work(struct work_struct *work)
> * and be ready for re-enable.
> */
> if (HAS_DDI(dev_priv)) {
> - if (intel_wait_for_register(dev_priv,
> - EDP_PSR_STATUS_CTL,
> - EDP_PSR_STATUS_STATE_MASK,
> - 0,
> - 50)) {
> - DRM_ERROR("Timed out waiting for PSR Idle for re-enable\n");
> - return;
> + if (dev_priv->psr.psr2_support) {
> + if (intel_wait_for_register(dev_priv,
> + EDP_PSR2_STATUS_CTL,
> + EDP_PSR2_STATUS_STATE_MASK,
> + 0,
> + 50)) {
> + DRM_ERROR("Timed out waiting for PSR2 Idle for re-enable\n");
> + return;
> + }
> + } else {
> + if (intel_wait_for_register(dev_priv,
> + EDP_PSR_STATUS_CTL,
> + EDP_PSR_STATUS_STATE_MASK,
> + 0,
> + 50)) {
> + DRM_ERROR("Timed out waiting for PSR Idle for re-enable\n");
> + return;
> + }
> }
> } else {
> if (intel_wait_for_register(dev_priv,
> @@ -656,11 +687,15 @@ static void intel_psr_exit(struct drm_i915_private *dev_priv)
> return;
>
> if (HAS_DDI(dev_priv)) {
> - val = I915_READ(EDP_PSR_CTL);
> -
> - WARN_ON(!(val & EDP_PSR_ENABLE));
> -
> - I915_WRITE(EDP_PSR_CTL, val & ~EDP_PSR_ENABLE);
> + if (dev_priv->psr.psr2_support) {
> + val = I915_READ(EDP_PSR2_CTL);
> + WARN_ON(!(val & EDP_PSR2_ENABLE));
> + I915_WRITE(EDP_PSR2_CTL, val & ~EDP_PSR2_ENABLE);
> + } else {
> + val = I915_READ(EDP_PSR_CTL);
> + WARN_ON(!(val & EDP_PSR_ENABLE));
> + I915_WRITE(EDP_PSR_CTL, val & ~EDP_PSR_ENABLE);
> + }
> } else {
> val = I915_READ(VLV_PSRCTL(pipe));
>
> --
> 1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
prev parent reply other threads:[~2016-12-15 16:09 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-14 15:32 [PATCH] drm/i915/psr: fix blank screen issue for psr2 vathsala nagaraju
2016-12-14 16:15 ` ✓ Fi.CI.BAT: success for " Patchwork
2016-12-15 16:08 ` Jim Bride [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20161215160830.GB26484@shiv \
--to=jim.bride@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=rodrigo.vivi@intel.com \
--cc=vathsala.nagaraju@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox