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From: ville.syrjala@linux.intel.com
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v2 02/14] drm/i915: Nuke intel_mode_max_pixclk()
Date: Fri, 20 Jan 2017 20:21:53 +0200	[thread overview]
Message-ID: <20170120182205.8141-3-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20170120182205.8141-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

ilk_max_pixel_rate() will now give the "correct" pixel rate for all
platforms, so let's rename it to intel_max_pixel_rate() and kill
off intel_mode_max_pixclk().

v2: Fix typo in commit message (Ander)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
---
 drivers/gpu/drm/i915/intel_display.c | 41 ++++++------------------------------
 1 file changed, 6 insertions(+), 35 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a825107b362b..d9910828b70b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -122,7 +122,7 @@ static void ironlake_pfit_disable(struct intel_crtc *crtc, bool force);
 static void ironlake_pfit_enable(struct intel_crtc *crtc);
 static void intel_modeset_setup_hw_state(struct drm_device *dev);
 static void intel_pre_disable_primary_noatomic(struct drm_crtc *crtc);
-static int ilk_max_pixel_rate(struct drm_atomic_state *state);
+static int intel_max_pixel_rate(struct drm_atomic_state *state);
 static int glk_calc_cdclk(int max_pixclk);
 static int bxt_calc_cdclk(int max_pixclk);
 
@@ -6553,40 +6553,11 @@ static int bxt_calc_cdclk(int max_pixclk)
 		return 144000;
 }
 
-/* Compute the max pixel clock for new configuration. */
-static int intel_mode_max_pixclk(struct drm_device *dev,
-				 struct drm_atomic_state *state)
-{
-	struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
-	struct drm_i915_private *dev_priv = to_i915(dev);
-	struct drm_crtc *crtc;
-	struct drm_crtc_state *crtc_state;
-	unsigned max_pixclk = 0, i;
-	enum pipe pipe;
-
-	memcpy(intel_state->min_pixclk, dev_priv->min_pixclk,
-	       sizeof(intel_state->min_pixclk));
-
-	for_each_crtc_in_state(state, crtc, crtc_state, i) {
-		int pixclk = 0;
-
-		if (crtc_state->enable)
-			pixclk = crtc_state->adjusted_mode.crtc_clock;
-
-		intel_state->min_pixclk[i] = pixclk;
-	}
-
-	for_each_pipe(dev_priv, pipe)
-		max_pixclk = max(intel_state->min_pixclk[pipe], max_pixclk);
-
-	return max_pixclk;
-}
-
 static int valleyview_modeset_calc_cdclk(struct drm_atomic_state *state)
 {
 	struct drm_device *dev = state->dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
-	int max_pixclk = intel_mode_max_pixclk(dev, state);
+	int max_pixclk = intel_max_pixel_rate(state);
 	struct intel_atomic_state *intel_state =
 		to_intel_atomic_state(state);
 
@@ -6602,7 +6573,7 @@ static int valleyview_modeset_calc_cdclk(struct drm_atomic_state *state)
 static int bxt_modeset_calc_cdclk(struct drm_atomic_state *state)
 {
 	struct drm_i915_private *dev_priv = to_i915(state->dev);
-	int max_pixclk = ilk_max_pixel_rate(state);
+	int max_pixclk = intel_max_pixel_rate(state);
 	struct intel_atomic_state *intel_state =
 		to_intel_atomic_state(state);
 	int cdclk;
@@ -10276,7 +10247,7 @@ static int bdw_adjust_min_pipe_pixel_rate(struct intel_crtc_state *crtc_state,
 }
 
 /* compute the max rate for new configuration */
-static int ilk_max_pixel_rate(struct drm_atomic_state *state)
+static int intel_max_pixel_rate(struct drm_atomic_state *state)
 {
 	struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
 	struct drm_i915_private *dev_priv = to_i915(state->dev);
@@ -10408,7 +10379,7 @@ static int broadwell_modeset_calc_cdclk(struct drm_atomic_state *state)
 {
 	struct drm_i915_private *dev_priv = to_i915(state->dev);
 	struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
-	int max_pixclk = ilk_max_pixel_rate(state);
+	int max_pixclk = intel_max_pixel_rate(state);
 	int cdclk;
 
 	/*
@@ -10444,7 +10415,7 @@ static int skl_modeset_calc_cdclk(struct drm_atomic_state *state)
 {
 	struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
 	struct drm_i915_private *dev_priv = to_i915(state->dev);
-	const int max_pixclk = ilk_max_pixel_rate(state);
+	const int max_pixclk = intel_max_pixel_rate(state);
 	int vco = intel_state->cdclk_pll_vco;
 	int cdclk;
 
-- 
2.10.2

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  parent reply	other threads:[~2017-01-20 18:22 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-20 18:21 [PATCH v3 00/14] drm/i915: Introduce intel_cdclk_state (v3) ville.syrjala
2017-01-20 18:21 ` [PATCH v2 01/14] drm/i915: Store the pipe pixel rate in the crtc state ville.syrjala
2017-01-23  9:13   ` Ander Conselvan De Oliveira
2017-01-24 12:30   ` David Weinehall
2017-01-26 19:50   ` [PATCH v3 " ville.syrjala
2017-01-20 18:21 ` ville.syrjala [this message]
2017-01-20 18:21 ` [PATCH 03/14] drm/i915: s/get_display_clock_speed/get_cdclk/ ville.syrjala
2017-01-26 19:51   ` [PATCH v2 " ville.syrjala
2017-02-07 18:31   ` [PATCH v3 " ville.syrjala
2017-01-20 18:21 ` [PATCH 04/14] drm/i915: Clean up the .get_cdclk() assignment if ladder ville.syrjala
2017-01-24 12:29   ` David Weinehall
2017-01-25 13:53     ` Ville Syrjälä
2017-02-07 18:32   ` [PATCH v2 " ville.syrjala
2017-01-20 18:21 ` [PATCH v2 05/14] drm/i915: Move most cdclk/rawclk related code to intel_cdclk.c ville.syrjala
2017-01-26 19:51   ` [PATCH v3 " ville.syrjala
2017-02-07 18:33   ` [PATCH v4 " ville.syrjala
2017-01-20 18:21 ` [PATCH 06/14] drm/i915: Pass computed vco to bxt_set_cdclk() ville.syrjala
2017-01-20 18:21 ` [PATCH v3 07/14] drm/i915: Start moving the cdclk stuff into a distinct state structure ville.syrjala
2017-02-07 18:33   ` [PATCH v4 " ville.syrjala
2017-01-20 18:21 ` [PATCH v3 08/14] drm/i915: Track full cdclk state for the logical and actual cdclk frequencies ville.syrjala
2017-01-20 18:22 ` [PATCH v2 09/14] drm/i915: Pass dev_priv to remainder of the cdclk functions ville.syrjala
2017-01-20 18:22 ` [PATCH v3 10/14] drm/i915: Pass the cdclk state to the set_cdclk() functions ville.syrjala
2017-01-20 18:22 ` [PATCH 11/14] drm/i915: Move PFI credit reprogramming into vlv/chv_set_cdclk() ville.syrjala
2017-01-26 19:57   ` [PATCH v2 " ville.syrjala
2017-01-20 18:22 ` [PATCH v2 12/14] drm/i915: Nuke the VLV/CHV PFI programming power domain workaround ville.syrjala
2017-01-20 18:22 ` [PATCH v3 13/14] drm/i915: Replace the .modeset_commit_cdclk() hook with a more direct .set_cdclk() hook ville.syrjala
2017-01-26 19:52   ` [PATCH v4 " ville.syrjala
2017-01-20 18:22 ` [PATCH 14/14] drm/i915: Move ilk_pipe_pixel_rate() to intel_display.c ville.syrjala
2017-01-20 18:54 ` ✗ Fi.CI.BAT: warning for drm/i915: Introduce intel_cdclk_state (rev3) Patchwork
2017-01-23  9:17 ` [PATCH v3 00/14] drm/i915: Introduce intel_cdclk_state (v3) Ander Conselvan De Oliveira
2017-01-26 23:54 ` ✗ Fi.CI.BAT: warning for drm/i915: Introduce intel_cdclk_state (rev8) Patchwork
2017-02-07 20:22 ` ✗ Fi.CI.BAT: warning for drm/i915: Introduce intel_cdclk_state (rev12) Patchwork
2017-02-08 16:55 ` [PATCH v3 00/14] drm/i915: Introduce intel_cdclk_state (v3) Ville Syrjälä

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