From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v3 2/2] drm/i915: Dump more configuration information for DSI
Date: Tue, 14 Feb 2017 22:33:56 +0200 [thread overview]
Message-ID: <20170214203356.GP31595@intel.com> (raw)
In-Reply-To: <20161221143114.23530-1-ville.syrjala@linux.intel.com>
On Wed, Dec 21, 2016 at 04:31:14PM +0200, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Dump out more of the DSI configuration details during init.
> This includes pclk, burst_mode_ratio, lane_count, pixel_overlap,
> video_mode_format and reset_timer_val.
>
> v2: Dump more info (Chris)
> v3: Use the VIDEO_MODE_ defines for consistency (Chris)
> Dump dphy_reg too (Chris)
>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Pushed this second patch of the series to dinq. Thanks for the review.
> ---
> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> index 3fd3bac5fccc..363828edc22f 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> @@ -808,6 +808,19 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
> 8);
> intel_dsi->clk_hs_to_lp_count += extra_byte_count;
>
> + DRM_DEBUG_KMS("Pclk %d\n", intel_dsi->pclk);
> + DRM_DEBUG_KMS("Pixel overlap %d\n", intel_dsi->pixel_overlap);
> + DRM_DEBUG_KMS("Lane count %d\n", intel_dsi->lane_count);
> + DRM_DEBUG_KMS("DPHY param reg 0x%x\n", intel_dsi->dphy_reg);
> + DRM_DEBUG_KMS("Video mode format %s\n",
> + intel_dsi->video_mode_format == VIDEO_MODE_NON_BURST_WITH_SYNC_PULSE ?
> + "non-burst with sync pulse" :
> + intel_dsi->video_mode_format == VIDEO_MODE_NON_BURST_WITH_SYNC_EVENTS ?
> + "non-burst with sync events" :
> + intel_dsi->video_mode_format == VIDEO_MODE_BURST ?
> + "burst" : "<unknown>");
> + DRM_DEBUG_KMS("Burst mode ratio %d\n", intel_dsi->burst_mode_ratio);
> + DRM_DEBUG_KMS("Reset timer %d\n", intel_dsi->rst_timer_val);
> DRM_DEBUG_KMS("Eot %s\n", enableddisabled(intel_dsi->eotp_pkt));
> DRM_DEBUG_KMS("Clockstop %s\n", enableddisabled(!intel_dsi->clock_stop));
> DRM_DEBUG_KMS("Mode %s\n", intel_dsi->operation_mode ? "command" : "video");
> --
> 2.10.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
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Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2017-02-14 20:34 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-13 21:09 [PATCH 1/2] drm/i915: Don't assume 60Hz when accounting for DSI pixel overlap ville.syrjala
2016-12-13 21:09 ` [PATCH 2/2] drm/i915: Dump the pclk and burst_mode_ratio for DSI ville.syrjala
2016-12-14 16:24 ` Chris Wilson
2016-12-14 16:43 ` Ville Syrjälä
2016-12-14 17:14 ` [PATCH 2/2] drm/i915: Dump more configuration information " ville.syrjala
2016-12-16 17:37 ` Chris Wilson
2016-12-21 14:31 ` [PATCH v3 " ville.syrjala
2017-02-14 20:33 ` Ville Syrjälä [this message]
2016-12-13 23:45 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Don't assume 60Hz when accounting for DSI pixel overlap Patchwork
2016-12-14 16:22 ` [PATCH 1/2] " Chris Wilson
2016-12-14 16:42 ` Ville Syrjälä
2016-12-14 17:45 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Don't assume 60Hz when accounting for DSI pixel overlap (rev2) Patchwork
2016-12-21 15:22 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Don't assume 60Hz when accounting for DSI pixel overlap (rev3) Patchwork
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