[PATCH 1/2] drm/i915: Don't assume 60Hz when accounting for DSI pixel overlap

[PATCH 1/2] drm/i915: Don't assume 60Hz when accounting for DSI pixel overlap

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Compute the increase in the DSI clock due to pixel overlap mode in
a way that's refresh rate agnostic. So far the computation assumed
a 60Hz refresh rate. And let's switch to round to closest here as
well since we would like to be as close to the target as possible.

Also toss in a decent comment explaining what we're actually doing
here.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 17 ++++++++++++-----
 1 file changed, 12 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
index 8f683b8b1816..3fd3bac5fccc 100644
--- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
@@ -603,13 +603,20 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
 	if (intel_dsi->dual_link) {
 		pclk = pclk / 2;
 
-		/* we can enable pixel_overlap if needed by panel. In this
-		 * case we need to increase the pixelclock for extra pixels
+		/*
+		 * In front-back mode the display is split vertically
+		 * and the first half of pixels are transmitted by the
+		 * first port, the second half by the second port. An
+		 * overlapping strip of pixels is transmitted by both
+		 * ports. The way this is specified is the number of
+		 * pixels each half is extended horizontally (ie,
+		 * pixel_overlap==1 actually means an overlap of two
+		 * pixels). Thus we do this after the division by 2,
+		 * otherwise we'd have to multiply the extra by two.
 		 */
 		if (intel_dsi->dual_link == DSI_DUAL_LINK_FRONT_BACK) {
-			pclk += DIV_ROUND_UP(mode->vtotal *
-						intel_dsi->pixel_overlap *
-						60, 1000);
+			pclk += DIV_ROUND_CLOSEST(intel_dsi->pixel_overlap *
+						  mode->clock, mode->htotal);
 		}
 	}
 
-- 
2.7.4

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[PATCH 2/2] drm/i915: Dump the pclk and burst_mode_ratio for DSI

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Dump out the computed pclk and burst_mode_ratio for DSI. These are
pretty important in figuring out timing related stuff.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
index 3fd3bac5fccc..8cef76153759 100644
--- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
@@ -808,6 +808,8 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
 			8);
 	intel_dsi->clk_hs_to_lp_count += extra_byte_count;
 
+	DRM_DEBUG_KMS("Pclk %d\n", intel_dsi->pclk);
+	DRM_DEBUG_KMS("Burst mode ratio %d\n", intel_dsi->burst_mode_ratio);
 	DRM_DEBUG_KMS("Eot %s\n", enableddisabled(intel_dsi->eotp_pkt));
 	DRM_DEBUG_KMS("Clockstop %s\n", enableddisabled(!intel_dsi->clock_stop));
 	DRM_DEBUG_KMS("Mode %s\n", intel_dsi->operation_mode ? "command" : "video");
-- 
2.7.4

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Re: [PATCH 2/2] drm/i915: Dump the pclk and burst_mode_ratio for DSI

[Chris Wilson]

On Tue, Dec 13, 2016 at 11:09:18PM +0200, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Dump out the computed pclk and burst_mode_ratio for DSI. These are
> pretty important in figuring out timing related stuff.

Pixel overlap? I don't see that being dumped anyway and seems relevant
to the topic.
-Chris

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Re: [PATCH 2/2] drm/i915: Dump the pclk and burst_mode_ratio for DSI

[Ville Syrjälä]

On Wed, Dec 14, 2016 at 04:24:02PM +0000, Chris Wilson wrote:
> On Tue, Dec 13, 2016 at 11:09:18PM +0200, ville.syrjala@linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Dump out the computed pclk and burst_mode_ratio for DSI. These are
> > pretty important in figuring out timing related stuff.
> 
> Pixel overlap? I don't see that being dumped anyway and seems relevant
> to the topic.

Yeah, dumping that too would make sense. I'll go over the whole
list once more and see what else is missing.

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[PATCH 2/2] drm/i915: Dump more configuration information for DSI

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Dump out more of the DSI configuration details during init.
This includes pclk, burst_mode_ratio, lane_count, pixel_overlap,
video_mode_format and reset_timer_val.

v2: Dump more info (Chris)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
index 3fd3bac5fccc..d2e3aa9c5022 100644
--- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
@@ -808,6 +808,15 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
 			8);
 	intel_dsi->clk_hs_to_lp_count += extra_byte_count;
 
+	DRM_DEBUG_KMS("Pclk %d\n", intel_dsi->pclk);
+	DRM_DEBUG_KMS("Pixel overlap %d\n", intel_dsi->pixel_overlap);
+	DRM_DEBUG_KMS("Lane count %d\n", intel_dsi->lane_count);
+	DRM_DEBUG_KMS("Video mode format %s\n",
+		      intel_dsi->video_mode_format == NON_BURST_SYNC_PULSE ? "non-burst with sync pulse" :
+		      intel_dsi->video_mode_format == NON_BURST_SYNC_EVENTS ? "non-burst with sync events" :
+		      intel_dsi->video_mode_format == BURST_MODE ? "burst" : "<unknown>");
+	DRM_DEBUG_KMS("Burst mode ratio %d\n", intel_dsi->burst_mode_ratio);
+	DRM_DEBUG_KMS("Reset timer %d\n", intel_dsi->rst_timer_val);
 	DRM_DEBUG_KMS("Eot %s\n", enableddisabled(intel_dsi->eotp_pkt));
 	DRM_DEBUG_KMS("Clockstop %s\n", enableddisabled(!intel_dsi->clock_stop));
 	DRM_DEBUG_KMS("Mode %s\n", intel_dsi->operation_mode ? "command" : "video");
-- 
2.7.4

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Re: [PATCH 2/2] drm/i915: Dump more configuration information for DSI

[Chris Wilson]

On Wed, Dec 14, 2016 at 07:14:05PM +0200, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Dump out more of the DSI configuration details during init.
> This includes pclk, burst_mode_ratio, lane_count, pixel_overlap,
> video_mode_format and reset_timer_val.
> 
> v2: Dump more info (Chris)

dphy_reg? No idea what it is, just another one I couldn't find printed.

> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> index 3fd3bac5fccc..d2e3aa9c5022 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> @@ -808,6 +808,15 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
>  			8);
>  	intel_dsi->clk_hs_to_lp_count += extra_byte_count;
>  
> +	DRM_DEBUG_KMS("Pclk %d\n", intel_dsi->pclk);
> +	DRM_DEBUG_KMS("Pixel overlap %d\n", intel_dsi->pixel_overlap);
> +	DRM_DEBUG_KMS("Lane count %d\n", intel_dsi->lane_count);
> +	DRM_DEBUG_KMS("Video mode format %s\n",
> +		      intel_dsi->video_mode_format == NON_BURST_SYNC_PULSE ? "non-burst with sync pulse" :
> +		      intel_dsi->video_mode_format == NON_BURST_SYNC_EVENTS ? "non-burst with sync events" :
> +		      intel_dsi->video_mode_format == BURST_MODE ? "burst" : "<unknown>");

Argh. The mipi_config.video_transfer_mode:2 has
#define NON_BURST_SYNC_PULSE    0x1
#define NON_BURST_SYNC_EVENTS   0x2
#define BURST_MODE              0x3

but intel_dist.video_mode_format is
#define  VIDEO_MODE_NON_BURST_WITH_SYNC_PULSE           (1 << 0)
#define  VIDEO_MODE_NON_BURST_WITH_SYNC_EVENTS          (2 << 0)
#define  VIDEO_MODE_BURST                               (3 << 0)

They match just usage is consistent.

However you want to resolve that,
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris

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[PATCH v3 2/2] drm/i915: Dump more configuration information for DSI

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Dump out more of the DSI configuration details during init.
This includes pclk, burst_mode_ratio, lane_count, pixel_overlap,
video_mode_format and reset_timer_val.

v2: Dump more info (Chris)
v3: Use the VIDEO_MODE_ defines for consistency (Chris)
    Dump dphy_reg too (Chris)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
index 3fd3bac5fccc..363828edc22f 100644
--- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
@@ -808,6 +808,19 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
 			8);
 	intel_dsi->clk_hs_to_lp_count += extra_byte_count;
 
+	DRM_DEBUG_KMS("Pclk %d\n", intel_dsi->pclk);
+	DRM_DEBUG_KMS("Pixel overlap %d\n", intel_dsi->pixel_overlap);
+	DRM_DEBUG_KMS("Lane count %d\n", intel_dsi->lane_count);
+	DRM_DEBUG_KMS("DPHY param reg 0x%x\n", intel_dsi->dphy_reg);
+	DRM_DEBUG_KMS("Video mode format %s\n",
+		      intel_dsi->video_mode_format == VIDEO_MODE_NON_BURST_WITH_SYNC_PULSE ?
+		      "non-burst with sync pulse" :
+		      intel_dsi->video_mode_format == VIDEO_MODE_NON_BURST_WITH_SYNC_EVENTS ?
+		      "non-burst with sync events" :
+		      intel_dsi->video_mode_format == VIDEO_MODE_BURST ?
+		      "burst" : "<unknown>");
+	DRM_DEBUG_KMS("Burst mode ratio %d\n", intel_dsi->burst_mode_ratio);
+	DRM_DEBUG_KMS("Reset timer %d\n", intel_dsi->rst_timer_val);
 	DRM_DEBUG_KMS("Eot %s\n", enableddisabled(intel_dsi->eotp_pkt));
 	DRM_DEBUG_KMS("Clockstop %s\n", enableddisabled(!intel_dsi->clock_stop));
 	DRM_DEBUG_KMS("Mode %s\n", intel_dsi->operation_mode ? "command" : "video");
-- 
2.10.2

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Re: [PATCH v3 2/2] drm/i915: Dump more configuration information for DSI

[Ville Syrjälä]

On Wed, Dec 21, 2016 at 04:31:14PM +0200, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Dump out more of the DSI configuration details during init.
> This includes pclk, burst_mode_ratio, lane_count, pixel_overlap,
> video_mode_format and reset_timer_val.
> 
> v2: Dump more info (Chris)
> v3: Use the VIDEO_MODE_ defines for consistency (Chris)
>     Dump dphy_reg too (Chris)
> 
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

Pushed this second patch of the series to dinq. Thanks for the review.

> ---
>  drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> index 3fd3bac5fccc..363828edc22f 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> @@ -808,6 +808,19 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
>  			8);
>  	intel_dsi->clk_hs_to_lp_count += extra_byte_count;
>  
> +	DRM_DEBUG_KMS("Pclk %d\n", intel_dsi->pclk);
> +	DRM_DEBUG_KMS("Pixel overlap %d\n", intel_dsi->pixel_overlap);
> +	DRM_DEBUG_KMS("Lane count %d\n", intel_dsi->lane_count);
> +	DRM_DEBUG_KMS("DPHY param reg 0x%x\n", intel_dsi->dphy_reg);
> +	DRM_DEBUG_KMS("Video mode format %s\n",
> +		      intel_dsi->video_mode_format == VIDEO_MODE_NON_BURST_WITH_SYNC_PULSE ?
> +		      "non-burst with sync pulse" :
> +		      intel_dsi->video_mode_format == VIDEO_MODE_NON_BURST_WITH_SYNC_EVENTS ?
> +		      "non-burst with sync events" :
> +		      intel_dsi->video_mode_format == VIDEO_MODE_BURST ?
> +		      "burst" : "<unknown>");
> +	DRM_DEBUG_KMS("Burst mode ratio %d\n", intel_dsi->burst_mode_ratio);
> +	DRM_DEBUG_KMS("Reset timer %d\n", intel_dsi->rst_timer_val);
>  	DRM_DEBUG_KMS("Eot %s\n", enableddisabled(intel_dsi->eotp_pkt));
>  	DRM_DEBUG_KMS("Clockstop %s\n", enableddisabled(!intel_dsi->clock_stop));
>  	DRM_DEBUG_KMS("Mode %s\n", intel_dsi->operation_mode ? "command" : "video");
> -- 
> 2.10.2
> 
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✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Don't assume 60Hz when accounting for DSI pixel overlap

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: Don't assume 60Hz when accounting for DSI pixel overlap
URL   : https://patchwork.freedesktop.org/series/16760/
State : success

== Summary ==

Series 16760v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/16760/revisions/1/mbox/

Test kms_force_connector_basic:
        Subgroup force-connector-state:
                skip       -> PASS       (fi-ivb-3520m)
        Subgroup force-edid:
                skip       -> PASS       (fi-ivb-3520m)
        Subgroup force-load-detect:
                skip       -> PASS       (fi-ivb-3520m)
        Subgroup prune-stale-modes:
                skip       -> PASS       (fi-ivb-3520m)

fi-bdw-5557u     total:247  pass:233  dwarn:0   dfail:0   fail:0   skip:14 
fi-bsw-n3050     total:247  pass:208  dwarn:0   dfail:0   fail:0   skip:39 
fi-bxt-t5700     total:247  pass:220  dwarn:0   dfail:0   fail:0   skip:27 
fi-byt-j1900     total:247  pass:220  dwarn:0   dfail:0   fail:0   skip:27 
fi-hsw-4770      total:247  pass:228  dwarn:0   dfail:0   fail:0   skip:19 
fi-hsw-4770r     total:247  pass:228  dwarn:0   dfail:0   fail:0   skip:19 
fi-ilk-650       total:247  pass:195  dwarn:0   dfail:0   fail:0   skip:52 
fi-ivb-3520m     total:247  pass:226  dwarn:0   dfail:0   fail:0   skip:21 
fi-ivb-3770      total:247  pass:226  dwarn:0   dfail:0   fail:0   skip:21 
fi-kbl-7500u     total:247  pass:226  dwarn:0   dfail:0   fail:0   skip:21 
fi-skl-6260u     total:247  pass:234  dwarn:0   dfail:0   fail:0   skip:13 
fi-skl-6700hq    total:247  pass:227  dwarn:0   dfail:0   fail:0   skip:20 
fi-skl-6700k     total:247  pass:224  dwarn:3   dfail:0   fail:0   skip:20 
fi-skl-6770hq    total:247  pass:234  dwarn:0   dfail:0   fail:0   skip:13 
fi-snb-2520m     total:247  pass:216  dwarn:0   dfail:0   fail:0   skip:31 
fi-snb-2600      total:247  pass:215  dwarn:0   dfail:0   fail:0   skip:32 
fi-byt-n2820 failed to collect. IGT log at Patchwork_3284/fi-byt-n2820/igt.log

9e21d6aaf4f3316ad25907240f3223d0099dd5fa drm-tip: 2016y-12m-13d-22h-41m-14s UTC integration manifest
e5c16a1 drm/i915: Dump the pclk and burst_mode_ratio for DSI
684e598 drm/i915: Don't assume 60Hz when accounting for DSI pixel overlap

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3284/
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Re: [PATCH 1/2] drm/i915: Don't assume 60Hz when accounting for DSI pixel overlap

[Chris Wilson]

On Tue, Dec 13, 2016 at 11:09:17PM +0200, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Compute the increase in the DSI clock due to pixel overlap mode in
> a way that's refresh rate agnostic. So far the computation assumed
> a 60Hz refresh rate. And let's switch to round to closest here as
> well since we would like to be as close to the target as possible.
> 
> Also toss in a decent comment explaining what we're actually doing
> here.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Not totally why being under the target is acceptable? But the
conversion from vtotal*60 to clock/htotal looks sound.
-Chris

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Re: [PATCH 1/2] drm/i915: Don't assume 60Hz when accounting for DSI pixel overlap

[Ville Syrjälä]

On Wed, Dec 14, 2016 at 04:22:22PM +0000, Chris Wilson wrote:
> On Tue, Dec 13, 2016 at 11:09:17PM +0200, ville.syrjala@linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Compute the increase in the DSI clock due to pixel overlap mode in
> > a way that's refresh rate agnostic. So far the computation assumed
> > a 60Hz refresh rate. And let's switch to round to closest here as
> > well since we would like to be as close to the target as possible.
> > 
> > Also toss in a decent comment explaining what we're actually doing
> > here.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Not totally why being under the target is acceptable?

It's a pixel clock, so closer seems better. At least that's what we do
elsewhere. There are a bunch of other round ups and downs in the DSI
code, and I'm not sure any of those really make sense. Might have to
review them all at some point.

> But the
> conversion from vtotal*60 to clock/htotal looks sound.
> -Chris
> 
> -- 
> Chris Wilson, Intel Open Source Technology Centre

-- 
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✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Don't assume 60Hz when accounting for DSI pixel overlap (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: Don't assume 60Hz when accounting for DSI pixel overlap (rev2)
URL   : https://patchwork.freedesktop.org/series/16760/
State : success

== Summary ==

Series 16760v2 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/16760/revisions/2/mbox/

Test kms_force_connector_basic:
        Subgroup force-connector-state:
                dmesg-warn -> PASS       (fi-snb-2520m)

fi-bdw-5557u     total:247  pass:233  dwarn:0   dfail:0   fail:0   skip:14 
fi-bsw-n3050     total:247  pass:208  dwarn:0   dfail:0   fail:0   skip:39 
fi-bxt-t5700     total:247  pass:220  dwarn:0   dfail:0   fail:0   skip:27 
fi-byt-j1900     total:247  pass:220  dwarn:0   dfail:0   fail:0   skip:27 
fi-byt-n2820     total:247  pass:216  dwarn:0   dfail:0   fail:0   skip:31 
fi-hsw-4770      total:247  pass:228  dwarn:0   dfail:0   fail:0   skip:19 
fi-ilk-650       total:247  pass:195  dwarn:0   dfail:0   fail:0   skip:52 
fi-ivb-3520m     total:247  pass:226  dwarn:0   dfail:0   fail:0   skip:21 
fi-ivb-3770      total:247  pass:226  dwarn:0   dfail:0   fail:0   skip:21 
fi-kbl-7500u     total:247  pass:226  dwarn:0   dfail:0   fail:0   skip:21 
fi-skl-6260u     total:247  pass:234  dwarn:0   dfail:0   fail:0   skip:13 
fi-skl-6700hq    total:247  pass:227  dwarn:0   dfail:0   fail:0   skip:20 
fi-skl-6700k     total:247  pass:224  dwarn:3   dfail:0   fail:0   skip:20 
fi-skl-6770hq    total:247  pass:234  dwarn:0   dfail:0   fail:0   skip:13 
fi-snb-2520m     total:247  pass:216  dwarn:0   dfail:0   fail:0   skip:31 
fi-snb-2600      total:247  pass:215  dwarn:0   dfail:0   fail:0   skip:32 

24fa971ea77320a76c074a8eb31eca00b321ec73 drm-tip: 2016y-12m-14d-13h-51m-36s UTC integration manifest
07063f4 drm/i915: Dump more configuration information for DSI
5da9e6d drm/i915: Don't assume 60Hz when accounting for DSI pixel overlap

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3289/
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✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Don't assume 60Hz when accounting for DSI pixel overlap (rev3)

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: Don't assume 60Hz when accounting for DSI pixel overlap (rev3)
URL   : https://patchwork.freedesktop.org/series/16760/
State : failure

== Summary ==

Series 16760v3 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/16760/revisions/3/mbox/

Test drv_module_reload:
        Subgroup basic-reload-inject:
                pass       -> INCOMPLETE (fi-kbl-7500u)
Test kms_force_connector_basic:
        Subgroup force-connector-state:
                dmesg-warn -> PASS       (fi-ivb-3770)

fi-bdw-5557u     total:247  pass:233  dwarn:0   dfail:0   fail:0   skip:14 
fi-bsw-n3050     total:247  pass:208  dwarn:0   dfail:0   fail:0   skip:39 
fi-bxt-j4205     total:247  pass:225  dwarn:1   dfail:0   fail:0   skip:21 
fi-bxt-t5700     total:247  pass:220  dwarn:0   dfail:0   fail:0   skip:27 
fi-byt-j1900     total:247  pass:220  dwarn:0   dfail:0   fail:0   skip:27 
fi-byt-n2820     total:247  pass:216  dwarn:0   dfail:0   fail:0   skip:31 
fi-hsw-4770      total:247  pass:228  dwarn:0   dfail:0   fail:0   skip:19 
fi-hsw-4770r     total:247  pass:228  dwarn:0   dfail:0   fail:0   skip:19 
fi-ilk-650       total:247  pass:195  dwarn:0   dfail:0   fail:0   skip:52 
fi-ivb-3520m     total:247  pass:226  dwarn:0   dfail:0   fail:0   skip:21 
fi-ivb-3770      total:247  pass:226  dwarn:0   dfail:0   fail:0   skip:21 
fi-kbl-7500u     total:7    pass:6    dwarn:0   dfail:0   fail:0   skip:0  
fi-skl-6260u     total:247  pass:234  dwarn:0   dfail:0   fail:0   skip:13 
fi-skl-6700hq    total:247  pass:227  dwarn:0   dfail:0   fail:0   skip:20 
fi-skl-6700k     total:247  pass:224  dwarn:3   dfail:0   fail:0   skip:20 
fi-skl-6770hq    total:247  pass:234  dwarn:0   dfail:0   fail:0   skip:13 
fi-snb-2600      total:247  pass:215  dwarn:0   dfail:0   fail:0   skip:32 

f45701ec502e5ee9682561be7578bd39741ad4bb drm-tip: 2016y-12m-21d-11h-52m-22s UTC integration manifest
5ad5c4b drm/i915: Dump more configuration information for DSI
eba08b4 drm/i915: Don't assume 60Hz when accounting for DSI pixel overlap

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3355/
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