From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 11/15] drm/i915: accurate page size tracking for the ppgtt
Date: Wed, 31 May 2017 19:52:06 +0100	[thread overview]
Message-ID: <20170531185210.29189-12-matthew.auld@intel.com> (raw)
In-Reply-To: <20170531185210.29189-1-matthew.auld@intel.com>
Now that we support multiple page sizes for the ppgtt, it would be
useful to track the real usage for debugging purposes.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c           | 10 ++++++++++
 drivers/gpu/drm/i915/i915_gem_object.h        |  2 ++
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c |  1 +
 3 files changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 924aec4adf6d..84de1618594e 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -217,6 +217,8 @@ static int ppgtt_bind_vma(struct i915_vma *vma,
 static void ppgtt_unbind_vma(struct i915_vma *vma)
 {
 	vma->vm->clear_range(vma->vm, vma->node.start, vma->size);
+
+	vma->obj->mm.page_sizes.gtt = 0;
 }
 
 static gen8_pte_t gen8_pte_encode(dma_addr_t addr,
@@ -924,6 +926,8 @@ static void gen8_ppgtt_insert_3lvl(struct i915_address_space *vm,
 
 	gen8_ppgtt_insert_pte_entries(ppgtt, &ppgtt->pdp, &iter, &idx,
 				      cache_level);
+
+	page_sizes->gtt = I915_GTT_PAGE_SIZE;
 }
 
 static void gen8_ppgtt_insert_4lvl(struct i915_address_space *vm,
@@ -972,6 +976,8 @@ static void gen8_ppgtt_insert_4lvl(struct i915_address_space *vm,
 			}
 		}
 
+		page_sizes->gtt |= page_size;
+
 		start += page_size;
 		iter.dma += page_size;
 		if (iter.dma >= iter.max) {
@@ -1731,6 +1737,8 @@ static void gen6_ppgtt_insert_entries(struct i915_address_space *vm,
 		}
 	} while (1);
 	kunmap_atomic(vaddr);
+
+	page_sizes->gtt = I915_GTT_PAGE_SIZE;
 }
 
 static int gen6_alloc_va_range(struct i915_address_space *vm,
@@ -2525,6 +2533,8 @@ static void aliasing_gtt_unbind_vma(struct i915_vma *vma)
 		struct i915_address_space *vm = &i915->mm.aliasing_ppgtt->base;
 
 		vm->clear_range(vm, vma->node.start, vma->size);
+
+		vma->obj->mm.page_sizes.gtt = 0;
 	}
 }
 
diff --git a/drivers/gpu/drm/i915/i915_gem_object.h b/drivers/gpu/drm/i915/i915_gem_object.h
index 6db34eac9794..9b00947bf856 100644
--- a/drivers/gpu/drm/i915/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/i915_gem_object.h
@@ -129,9 +129,11 @@ struct drm_i915_gem_object {
 		struct sg_table *pages;
 		void *mapping;
 
+		/* TODO: whack some of this into the error state */
 		struct i915_page_sizes {
 			unsigned int phys;
 			unsigned int sg;
+			unsigned int gtt;
 		} page_sizes;
 
 		struct i915_gem_object_page_iter {
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
index 81c0d6b87e68..954f4140d902 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
@@ -267,6 +267,7 @@ static int lowlevel_hole(struct drm_i915_private *i915,
 
 			GEM_BUG_ON(addr + BIT_ULL(size) > vm->total);
 			vm->clear_range(vm, addr, BIT_ULL(size));
+			obj->mm.page_sizes.gtt = 0;
 		}
 
 		i915_gem_object_unpin_pages(obj);
-- 
2.9.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply	other threads:[~2017-05-31 18:52 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-31 18:51 [PATCH 00/15] huge gtt pages Matthew Auld
2017-05-31 18:51 ` [PATCH 01/15] drm/i915: really simple gemfs Matthew Auld
2017-05-31 19:16   ` Chris Wilson
2017-06-01 10:49   ` Joonas Lahtinen
2017-06-01 12:33     ` Matthew Auld
2017-05-31 18:51 ` [PATCH 02/15] drm/i915: enable THP for gemfs Matthew Auld
2017-06-01 10:27   ` Joonas Lahtinen
2017-05-31 18:51 ` [PATCH 03/15] drm/i915: introduce page_size_mask to dev_info Matthew Auld
2017-05-31 19:19   ` Chris Wilson
2017-06-01 10:57   ` Joonas Lahtinen
2017-06-01 12:10     ` Jani Nikula
2017-05-31 18:51 ` [PATCH 04/15] drm/i915: introduce gem object page_sizes Matthew Auld
2017-05-31 19:25   ` Chris Wilson
2017-06-01  9:49   ` Chris Wilson
2017-05-31 18:52 ` [PATCH 05/15] drm/i915: align the vma start to the largest gtt page size Matthew Auld
2017-05-31 19:31   ` Chris Wilson
2017-05-31 18:52 ` [PATCH 06/15] drm/i915: align 64K objects to 2M Matthew Auld
2017-06-01  9:55   ` Chris Wilson
2017-05-31 18:52 ` [PATCH 07/15] drm/i915: pass mm.gtt_page_sizes to ppgtt insert_entries Matthew Auld
2017-05-31 19:10   ` Chris Wilson
2017-05-31 18:52 ` [PATCH 08/15] drm/i915: enable IPS bit for 64K pages Matthew Auld
2017-05-31 18:52 ` [PATCH 09/15] drm/i915: disable GTT cache for 2M/1G pages Matthew Auld
2017-06-01  9:56   ` Chris Wilson
2017-05-31 18:52 ` [PATCH 10/15] drm/i915: support huge gtt pages for the 48b PPGTT Matthew Auld
2017-05-31 18:52 ` Matthew Auld [this message]
2017-05-31 18:52 ` [PATCH 12/15] drm/i915/debugfs: include some gtt page size metrics Matthew Auld
2017-05-31 18:52 ` [PATCH 13/15] drm/i915: enable platform support for 64K pages Matthew Auld
2017-05-31 18:52 ` [PATCH 14/15] drm/i915: enable platform support for 2M pages Matthew Auld
2017-05-31 18:52 ` [PATCH 15/15] drm/i915: enable platform support for 1G pages Matthew Auld
2017-05-31 19:11 ` ✓ Fi.CI.BAT: success for huge gtt pages Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox
  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):
  git send-email \
    --in-reply-to=20170531185210.29189-12-matthew.auld@intel.com \
    --to=matthew.auld@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY
  https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
  Be sure your reply has a Subject: header at the top and a blank line
  before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).