From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 03/15] drm/i915: introduce page_size_mask to dev_info
Date: Wed, 31 May 2017 19:51:58 +0100 [thread overview]
Message-ID: <20170531185210.29189-4-matthew.auld@intel.com> (raw)
In-Reply-To: <20170531185210.29189-1-matthew.auld@intel.com>
In preparation for huge gtt pages expose a page_size_mask as part of the
device info, to indicate the page sizes supported by the HW. Currently
only 4K is supported.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_gem_gtt.h | 8 +++++++-
drivers/gpu/drm/i915/i915_pci.c | 21 +++++++++++++++++++++
drivers/gpu/drm/i915/selftests/mock_gem_device.c | 3 +++
4 files changed, 32 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ca3196e2566f..8be48e5d8c1f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -840,6 +840,7 @@ struct intel_device_info {
enum intel_platform platform;
u8 ring_mask; /* Rings supported by the HW */
u8 num_rings;
+ unsigned int page_size_mask; /* page sizes supported by the HW */
#define DEFINE_FLAG(name) u8 name:1
DEV_INFO_FOR_EACH_FLAG(DEFINE_FLAG);
#undef DEFINE_FLAG
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index fb15684c1d83..f8db231c28aa 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -42,7 +42,13 @@
#include "i915_gem_request.h"
#include "i915_selftest.h"
-#define I915_GTT_PAGE_SIZE 4096UL
+#define I915_GTT_PAGE_SIZE_4K BIT(12)
+#define I915_GTT_PAGE_SIZE_64K BIT(16)
+#define I915_GTT_PAGE_SIZE_2M BIT(21)
+#define I915_GTT_PAGE_SIZE_1G BIT(30)
+
+#define I915_GTT_PAGE_SIZE I915_GTT_PAGE_SIZE_4K
+
#define I915_GTT_MIN_ALIGNMENT I915_GTT_PAGE_SIZE
#define I915_FENCE_REG_NONE -1
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index f80db2ccd92f..7caccb5bf963 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -56,6 +56,10 @@
.color = { .degamma_lut_size = 65, .gamma_lut_size = 257 }
/* Keep in gen based order, and chronological order within a gen */
+
+#define GEN_DEFAULT_PAGE_SIZES \
+ .page_size_mask = I915_GTT_PAGE_SIZE_4K
+
#define GEN2_FEATURES \
.gen = 2, .num_pipes = 1, \
.has_overlay = 1, .overlay_needs_physical = 1, \
@@ -64,6 +68,7 @@
.unfenced_needs_alignment = 1, \
.ring_mask = RENDER_RING, \
GEN_DEFAULT_PIPEOFFSETS, \
+ GEN_DEFAULT_PAGE_SIZES, \
CURSOR_OFFSETS
static const struct intel_device_info intel_i830_info = {
@@ -96,6 +101,7 @@ static const struct intel_device_info intel_i865g_info = {
.has_gmch_display = 1, \
.ring_mask = RENDER_RING, \
GEN_DEFAULT_PIPEOFFSETS, \
+ GEN_DEFAULT_PAGE_SIZES, \
CURSOR_OFFSETS
static const struct intel_device_info intel_i915g_info = {
@@ -158,6 +164,7 @@ static const struct intel_device_info intel_pineview_info = {
.has_gmch_display = 1, \
.ring_mask = RENDER_RING, \
GEN_DEFAULT_PIPEOFFSETS, \
+ GEN_DEFAULT_PAGE_SIZES, \
CURSOR_OFFSETS
static const struct intel_device_info intel_i965g_info = {
@@ -198,6 +205,7 @@ static const struct intel_device_info intel_gm45_info = {
.has_gmbus_irq = 1, \
.ring_mask = RENDER_RING | BSD_RING, \
GEN_DEFAULT_PIPEOFFSETS, \
+ GEN_DEFAULT_PAGE_SIZES, \
CURSOR_OFFSETS
static const struct intel_device_info intel_ironlake_d_info = {
@@ -222,6 +230,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
.has_gmbus_irq = 1, \
.has_aliasing_ppgtt = 1, \
GEN_DEFAULT_PIPEOFFSETS, \
+ GEN_DEFAULT_PAGE_SIZES, \
CURSOR_OFFSETS
static const struct intel_device_info intel_sandybridge_d_info = {
@@ -247,6 +256,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
.has_aliasing_ppgtt = 1, \
.has_full_ppgtt = 1, \
GEN_DEFAULT_PIPEOFFSETS, \
+ GEN_DEFAULT_PAGE_SIZES, \
IVB_CURSOR_OFFSETS
static const struct intel_device_info intel_ivybridge_d_info = {
@@ -284,6 +294,7 @@ static const struct intel_device_info intel_valleyview_info = {
.has_full_ppgtt = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING,
.display_mmio_offset = VLV_DISPLAY_BASE,
+ GEN_DEFAULT_PAGE_SIZES,
GEN_DEFAULT_PIPEOFFSETS,
CURSOR_OFFSETS
};
@@ -308,6 +319,7 @@ static const struct intel_device_info intel_haswell_info = {
#define BDW_FEATURES \
HSW_FEATURES, \
BDW_COLORS, \
+ GEN_DEFAULT_PAGE_SIZES, \
.has_logical_ring_contexts = 1, \
.has_full_48bit_ppgtt = 1, \
.has_64bit_reloc = 1
@@ -342,13 +354,18 @@ static const struct intel_device_info intel_cherryview_info = {
.has_aliasing_ppgtt = 1,
.has_full_ppgtt = 1,
.display_mmio_offset = VLV_DISPLAY_BASE,
+ GEN_DEFAULT_PAGE_SIZES,
GEN_CHV_PIPEOFFSETS,
CURSOR_OFFSETS,
CHV_COLORS,
};
+#define GEN9_DEFAULT_PAGE_SIZES \
+ .page_size_mask = I915_GTT_PAGE_SIZE_4K
+
static const struct intel_device_info intel_skylake_info = {
BDW_FEATURES,
+ GEN_DEFAULT_PAGE_SIZES,
.platform = INTEL_SKYLAKE,
.gen = 9,
.has_csr = 1,
@@ -358,6 +375,7 @@ static const struct intel_device_info intel_skylake_info = {
static const struct intel_device_info intel_skylake_gt3_info = {
BDW_FEATURES,
+ GEN9_DEFAULT_PAGE_SIZES,
.platform = INTEL_SKYLAKE,
.gen = 9,
.has_csr = 1,
@@ -389,6 +407,7 @@ static const struct intel_device_info intel_skylake_gt3_info = {
.has_aliasing_ppgtt = 1, \
.has_full_ppgtt = 1, \
.has_full_48bit_ppgtt = 1, \
+ GEN9_DEFAULT_PAGE_SIZES, \
GEN_DEFAULT_PIPEOFFSETS, \
IVB_CURSOR_OFFSETS, \
BDW_COLORS
@@ -409,6 +428,7 @@ static const struct intel_device_info intel_geminilake_info = {
static const struct intel_device_info intel_kabylake_info = {
BDW_FEATURES,
+ GEN9_DEFAULT_PAGE_SIZES,
.platform = INTEL_KABYLAKE,
.gen = 9,
.has_csr = 1,
@@ -418,6 +438,7 @@ static const struct intel_device_info intel_kabylake_info = {
static const struct intel_device_info intel_kabylake_gt3_info = {
BDW_FEATURES,
+ GEN9_DEFAULT_PAGE_SIZES,
.platform = INTEL_KABYLAKE,
.gen = 9,
.has_csr = 1,
diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
index 7f038ea15ef5..bb12e6fe24ec 100644
--- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
+++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
@@ -147,6 +147,9 @@ struct drm_i915_private *mock_gem_device(void)
mkwrite_device_info(i915)->gen = -1;
+ mkwrite_device_info(i915)->page_size_mask =
+ I915_GTT_PAGE_SIZE_4K;
+
spin_lock_init(&i915->mm.object_stat_lock);
mock_uncore_init(i915);
--
2.9.4
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next prev parent reply other threads:[~2017-05-31 18:52 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-31 18:51 [PATCH 00/15] huge gtt pages Matthew Auld
2017-05-31 18:51 ` [PATCH 01/15] drm/i915: really simple gemfs Matthew Auld
2017-05-31 19:16 ` Chris Wilson
2017-06-01 10:49 ` Joonas Lahtinen
2017-06-01 12:33 ` Matthew Auld
2017-05-31 18:51 ` [PATCH 02/15] drm/i915: enable THP for gemfs Matthew Auld
2017-06-01 10:27 ` Joonas Lahtinen
2017-05-31 18:51 ` Matthew Auld [this message]
2017-05-31 19:19 ` [PATCH 03/15] drm/i915: introduce page_size_mask to dev_info Chris Wilson
2017-06-01 10:57 ` Joonas Lahtinen
2017-06-01 12:10 ` Jani Nikula
2017-05-31 18:51 ` [PATCH 04/15] drm/i915: introduce gem object page_sizes Matthew Auld
2017-05-31 19:25 ` Chris Wilson
2017-06-01 9:49 ` Chris Wilson
2017-05-31 18:52 ` [PATCH 05/15] drm/i915: align the vma start to the largest gtt page size Matthew Auld
2017-05-31 19:31 ` Chris Wilson
2017-05-31 18:52 ` [PATCH 06/15] drm/i915: align 64K objects to 2M Matthew Auld
2017-06-01 9:55 ` Chris Wilson
2017-05-31 18:52 ` [PATCH 07/15] drm/i915: pass mm.gtt_page_sizes to ppgtt insert_entries Matthew Auld
2017-05-31 19:10 ` Chris Wilson
2017-05-31 18:52 ` [PATCH 08/15] drm/i915: enable IPS bit for 64K pages Matthew Auld
2017-05-31 18:52 ` [PATCH 09/15] drm/i915: disable GTT cache for 2M/1G pages Matthew Auld
2017-06-01 9:56 ` Chris Wilson
2017-05-31 18:52 ` [PATCH 10/15] drm/i915: support huge gtt pages for the 48b PPGTT Matthew Auld
2017-05-31 18:52 ` [PATCH 11/15] drm/i915: accurate page size tracking for the ppgtt Matthew Auld
2017-05-31 18:52 ` [PATCH 12/15] drm/i915/debugfs: include some gtt page size metrics Matthew Auld
2017-05-31 18:52 ` [PATCH 13/15] drm/i915: enable platform support for 64K pages Matthew Auld
2017-05-31 18:52 ` [PATCH 14/15] drm/i915: enable platform support for 2M pages Matthew Auld
2017-05-31 18:52 ` [PATCH 15/15] drm/i915: enable platform support for 1G pages Matthew Auld
2017-05-31 19:11 ` ✓ Fi.CI.BAT: success for huge gtt pages Patchwork
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