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From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 05/15] drm/i915: align the vma start to the largest gtt page size
Date: Wed, 31 May 2017 19:52:00 +0100	[thread overview]
Message-ID: <20170531185210.29189-6-matthew.auld@intel.com> (raw)
In-Reply-To: <20170531185210.29189-1-matthew.auld@intel.com>

When inserting into a 48bit PPGTT we should the align the vma start
address to the required page size boundary, to guarantee we use said
page size in the gtt. If we are dealing with multiple page-sizes, we
can't guarantee anything and just align to the largest. For soft pinning
we don't force any alignment.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_vma.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 1aba47024656..c355ccb01872 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -485,6 +485,18 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
 		if (ret)
 			goto err_unpin;
 	} else {
+		if (i915_vm_is_48bit(vma->vm) &&
+		    obj->mm.page_sizes.sg > I915_GTT_PAGE_SIZE) {
+			unsigned int page_alignment = obj->mm.page_sizes.sg;
+
+			/* Align to the largest and hope for the best */
+			if (!is_power_of_2(page_alignment))
+				page_alignment = BIT(fls64(page_alignment)-1);
+
+			alignment = max_t(typeof(alignment), alignment,
+					  page_alignment);
+		}
+
 		ret = i915_gem_gtt_insert(vma->vm, &vma->node,
 					  size, alignment, obj->cache_level,
 					  start, end, flags);
-- 
2.9.4

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  parent reply	other threads:[~2017-05-31 18:52 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-31 18:51 [PATCH 00/15] huge gtt pages Matthew Auld
2017-05-31 18:51 ` [PATCH 01/15] drm/i915: really simple gemfs Matthew Auld
2017-05-31 19:16   ` Chris Wilson
2017-06-01 10:49   ` Joonas Lahtinen
2017-06-01 12:33     ` Matthew Auld
2017-05-31 18:51 ` [PATCH 02/15] drm/i915: enable THP for gemfs Matthew Auld
2017-06-01 10:27   ` Joonas Lahtinen
2017-05-31 18:51 ` [PATCH 03/15] drm/i915: introduce page_size_mask to dev_info Matthew Auld
2017-05-31 19:19   ` Chris Wilson
2017-06-01 10:57   ` Joonas Lahtinen
2017-06-01 12:10     ` Jani Nikula
2017-05-31 18:51 ` [PATCH 04/15] drm/i915: introduce gem object page_sizes Matthew Auld
2017-05-31 19:25   ` Chris Wilson
2017-06-01  9:49   ` Chris Wilson
2017-05-31 18:52 ` Matthew Auld [this message]
2017-05-31 19:31   ` [PATCH 05/15] drm/i915: align the vma start to the largest gtt page size Chris Wilson
2017-05-31 18:52 ` [PATCH 06/15] drm/i915: align 64K objects to 2M Matthew Auld
2017-06-01  9:55   ` Chris Wilson
2017-05-31 18:52 ` [PATCH 07/15] drm/i915: pass mm.gtt_page_sizes to ppgtt insert_entries Matthew Auld
2017-05-31 19:10   ` Chris Wilson
2017-05-31 18:52 ` [PATCH 08/15] drm/i915: enable IPS bit for 64K pages Matthew Auld
2017-05-31 18:52 ` [PATCH 09/15] drm/i915: disable GTT cache for 2M/1G pages Matthew Auld
2017-06-01  9:56   ` Chris Wilson
2017-05-31 18:52 ` [PATCH 10/15] drm/i915: support huge gtt pages for the 48b PPGTT Matthew Auld
2017-05-31 18:52 ` [PATCH 11/15] drm/i915: accurate page size tracking for the ppgtt Matthew Auld
2017-05-31 18:52 ` [PATCH 12/15] drm/i915/debugfs: include some gtt page size metrics Matthew Auld
2017-05-31 18:52 ` [PATCH 13/15] drm/i915: enable platform support for 64K pages Matthew Auld
2017-05-31 18:52 ` [PATCH 14/15] drm/i915: enable platform support for 2M pages Matthew Auld
2017-05-31 18:52 ` [PATCH 15/15] drm/i915: enable platform support for 1G pages Matthew Auld
2017-05-31 19:11 ` ✓ Fi.CI.BAT: success for huge gtt pages Patchwork

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