Re: [passive aggressive RESEND 1/2] drm/i915: Mark CPU cache as dirty on every transition for CPU writes

Chris Wilson
2017-06-16T13:56:52Z

Quoting Tvrtko Ursulin (2017-06-16 13:59:38)
> Okay, got this one as well. There is what looks to be a stale comment
> talking about moving to gtt above this block btw.
>
> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Thanks for taking the time to go through these. The code has been
very much developed empirically and it shows; many earlier hypotheses
about how the hw actualy works have had to be thrown out when the bugs
bit. A fresh viewpoint is most welcome.

Pushed,
-Chris