[RFC i-g-t 1/2] igt/gem_engine_info: Test the new uAPI

[RFC i-g-t 1/2] igt/gem_engine_info: Test the new uAPI

[Tvrtko Ursulin]

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Test that the engine info ioctl works.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tests/Makefile.sources  |   1 +
 tests/gem_engine_info.c | 317 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 318 insertions(+)
 create mode 100644 tests/gem_engine_info.c

diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 5b98a5a371b8..010d9d796954 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -61,6 +61,7 @@ TESTS_progs = \
 	gem_ctx_thrash \
 	gem_double_irq_loop \
 	gem_eio \
+	gem_engine_info \
 	gem_evict_alignment \
 	gem_evict_everything \
 	gem_exec_alignment \
diff --git a/tests/gem_engine_info.c b/tests/gem_engine_info.c
new file mode 100644
index 000000000000..cd570de60ebd
--- /dev/null
+++ b/tests/gem_engine_info.c
@@ -0,0 +1,317 @@
+/*
+ * Copyright © 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "igt.h"
+
+IGT_TEST_DESCRIPTION("Testing the engine info uAPI.");
+
+#define LOCAL_DRM_I915_GEM_ENGINE_INFO	0x37
+
+#define LOCAL_DRM_IOCTL_I915_GEM_ENGINE_INFO \
+	DRM_IOWR(DRM_COMMAND_BASE + LOCAL_DRM_I915_GEM_ENGINE_INFO, \
+		 struct local_drm_i915_gem_engine_info)
+
+enum local_drm_i915_gem_engine_class {
+	I915_ENGINE_CLASS_OTHER = 0,
+	I915_ENGINE_CLASS_RENDER = 1,
+	I915_ENGINE_CLASS_COPY = 2,
+	I915_ENGINE_CLASS_VIDEO = 3,
+	I915_ENGINE_CLASS_VIDEO_ENHANCE = 4,
+	I915_ENGINE_CLASS_MAX /* non-ABI */
+};
+
+struct local_drm_i915_engine_info {
+	/** Engine instance number. */
+	__u8	instance;
+
+	/** Engine specific info. */
+#define LOCAL_I915_VCS_HAS_HEVC	BIT(0)
+	__u8	info;
+
+	__u8	rsvd[6];
+};
+
+struct local_drm_i915_gem_engine_info {
+	/** in/out: Protocol version requested/supported. */
+	__u32 version;
+
+	/** in: Engine class to probe (enum drm_i915_gem_engine_class). */
+	__u32 engine_class;
+
+	/**
+	 * in/out: Number of struct drm_i915_engine_info entries in the provided
+	 * @info_ptr array and actual number of supported hardware engines.
+	 */
+	__u32 num_engines;
+	__u32 rsvd;
+
+	/** in/out: Pointer to array of struct i915_engine_info elements. */
+	__u64 info_ptr;
+
+};
+
+static int
+__get_engine_info(int fd, struct local_drm_i915_gem_engine_info *info)
+{
+	int ret;
+
+	ret = drmIoctl(fd, LOCAL_DRM_IOCTL_I915_GEM_ENGINE_INFO, info);
+	if (ret)
+		ret = -errno;
+
+	return ret;
+}
+
+static void test_version(int fd)
+{
+	struct local_drm_i915_gem_engine_info info = {};
+	int ret;
+
+	info.version = 0;
+	ret = __get_engine_info(fd, &info);
+	igt_assert_eq(ret, 0);
+	igt_assert_eq(info.version, 1);
+}
+
+static void test_garbage(int fd)
+{
+	struct local_drm_i915_gem_engine_info info = {};
+	int ret;
+
+	info.version = 1;
+	info.rsvd = 1;
+
+	ret = __get_engine_info(fd, &info);
+	igt_assert_eq(ret, -EINVAL);
+}
+
+static void test_enum_classes(int fd)
+{
+	struct local_drm_i915_gem_engine_info info;
+	enum local_drm_i915_gem_engine_class class;
+	int ret;
+
+	for (class = 0; class < 100 /* a large number */; class++) {
+		memset(&info, 0, sizeof(info));
+		info.version = 1;
+		info.engine_class = class;
+		ret = __get_engine_info(fd, &info);
+		if (class < I915_ENGINE_CLASS_MAX) {
+			igt_assert_eq(ret, 0);
+		} else {
+			igt_assert_eq(ret, -EINVAL);
+			break;
+		}
+	}
+}
+
+static void test_enum_other_class(int fd)
+{
+	struct local_drm_i915_gem_engine_info info = {};
+	int ret;
+
+	info.version = 1;
+	info.engine_class = I915_ENGINE_CLASS_OTHER;
+
+	ret = __get_engine_info(fd, &info);
+	igt_assert_eq(ret, 0);
+	igt_assert_eq(info.num_engines, 0);
+}
+
+static void test_enum_vcs_class(int fd)
+{
+	struct local_drm_i915_gem_engine_info info = {};
+	unsigned int num_vcs;
+	int ret;
+
+	num_vcs = gem_has_bsd(fd);
+	num_vcs += gem_has_bsd2(fd);
+
+	info.version = 1;
+	info.engine_class = I915_ENGINE_CLASS_VIDEO;
+
+	ret = __get_engine_info(fd, &info);
+	igt_assert_eq(ret, 0);
+	igt_assert(info.num_engines >= num_vcs);
+}
+
+static void test_enum_other_classes(int fd)
+{
+	struct local_drm_i915_gem_engine_info info;
+	enum local_drm_i915_gem_engine_class class;
+	int ret;
+
+	for (class = 0; class < I915_ENGINE_CLASS_MAX; class++) {
+		if (class == I915_ENGINE_CLASS_VIDEO ||
+		    class == I915_ENGINE_CLASS_OTHER)
+			continue;
+
+		memset(&info, 0, sizeof(info));
+		info.version = 1;
+		info.engine_class = class;
+		ret = __get_engine_info(fd, &info);
+		igt_assert_eq(ret, 0);
+		igt_assert_eq(info.num_engines, 1);
+	}
+}
+
+static void test_null_array(int fd)
+{
+	struct local_drm_i915_gem_engine_info info = {};
+	int ret;
+
+	info.version = 1;
+	info.engine_class = I915_ENGINE_CLASS_RENDER;
+	info.num_engines = 1;
+	info.info_ptr = 0;
+
+	ret = __get_engine_info(fd, &info);
+	igt_assert_eq(ret, -EFAULT);
+}
+
+static void test_short_array(int fd)
+{
+	struct local_drm_i915_gem_engine_info info = {};
+	struct local_drm_i915_engine_info engines[2];
+	unsigned int num_vcs;
+	int ret;
+
+	igt_require(gem_has_bsd2(fd));
+
+	num_vcs = gem_has_bsd(fd);
+	num_vcs += gem_has_bsd2(fd);
+
+	info.version = 1;
+	info.engine_class = I915_ENGINE_CLASS_VIDEO;
+	info.num_engines = 1;
+	info.info_ptr = to_user_pointer(&engines[0]);
+	memset(engines, 0, sizeof(engines));
+
+	ret = __get_engine_info(fd, &info);
+	igt_assert_eq(ret, 0);
+
+	igt_assert_eq(info.num_engines, num_vcs);
+	igt_assert_eq(engines[1].instance, 0);
+}
+
+static unsigned int legacy_count_engines(int fd)
+{
+	unsigned int total = 0;
+	const struct intel_execution_engine *e;
+
+	for (e = intel_execution_engines; e->name; e++) {
+		if (e->exec_id == 0)
+			continue;
+
+		if (!gem_has_ring(fd, e->exec_id | e->flags))
+			continue;
+
+		if (e->exec_id == I915_EXEC_BSD) {
+			int is_bsd2 = e->flags != 0;
+			if (gem_has_bsd2(fd) != is_bsd2)
+				continue;
+		}
+
+		total++;
+	}
+
+	return total;
+}
+
+static void test_query_classes(int fd)
+{
+	unsigned int legacy_num_engines = legacy_count_engines(fd);
+	unsigned int num_engines = 0;
+	enum local_drm_i915_gem_engine_class class;
+	struct local_drm_i915_gem_engine_info info;
+	struct local_drm_i915_engine_info engines[16]; /* a large number */
+	unsigned int i, j;
+	int ret;
+
+	for (class = 0; class < I915_ENGINE_CLASS_MAX; class++) {
+		memset(&info, 0, sizeof(info));
+		info.version = 1;
+		info.engine_class = class;
+		info.num_engines = ARRAY_SIZE(engines);
+		info.info_ptr = to_user_pointer(&engines[0]);
+		ret = __get_engine_info(fd, &info);
+		igt_assert_eq(ret, 0);
+		num_engines += info.num_engines;
+		for (i = 0; i < info.num_engines; i++) {
+			for (j = 0; j < ARRAY_SIZE(engines[0].rsvd); j++)
+				igt_assert_eq(engines[i].rsvd[j], 0);
+		}
+	}
+
+	igt_debug("num_engines=%u/%u\n", num_engines, legacy_num_engines);
+
+	igt_assert_eq(num_engines, legacy_num_engines);
+}
+
+igt_main
+{
+	int fd = -1;
+
+	igt_fixture {
+		struct local_drm_i915_gem_engine_info info = {};
+		int ret;
+
+		fd = drm_open_driver(DRIVER_INTEL);
+
+		info.version = 1;
+		ret = __get_engine_info(fd, &info);
+		igt_require(ret == 0);
+		igt_require(info.version == 1);
+	}
+
+	igt_subtest("basic-version")
+		test_version(fd);
+
+	igt_subtest("basic-garbage")
+		test_garbage(fd);
+
+	igt_subtest("basic-enum-classes")
+		test_enum_classes(fd);
+
+	igt_subtest("basic-enum-other-class")
+		test_enum_other_class(fd);
+
+	igt_subtest("basic-enum-vcs-class")
+		test_enum_vcs_class(fd);
+
+	igt_subtest("basic-enum-other-classes")
+		test_enum_other_classes(fd);
+
+	igt_subtest("basic-null-array")
+		test_null_array(fd);
+
+	igt_subtest("basic-short-array")
+		test_short_array(fd);
+
+	igt_subtest("basic-query-classes")
+		test_query_classes(fd);
+
+	igt_fixture {
+		close(fd);
+	}
+}
-- 
2.9.4

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[RFC i-g-t 2/2] igt/gem_exec_class_instance: Test the new uAPI

[Tvrtko Ursulin]

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Submit a few valid and invalid no-op batches using the new class-
instance execbuf interface.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tests/Makefile.sources          |   1 +
 tests/gem_exec_class_instance.c | 177 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 178 insertions(+)
 create mode 100644 tests/gem_exec_class_instance.c

diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 010d9d796954..0cd769ed8838 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -72,6 +72,7 @@ TESTS_progs = \
 	gem_exec_big \
 	gem_exec_blt \
 	gem_exec_capture \
+	gem_exec_class_instance \
 	gem_exec_create \
 	gem_exec_faulting_reloc \
 	gem_exec_fence \
diff --git a/tests/gem_exec_class_instance.c b/tests/gem_exec_class_instance.c
new file mode 100644
index 000000000000..503da99d6603
--- /dev/null
+++ b/tests/gem_exec_class_instance.c
@@ -0,0 +1,177 @@
+/*
+ * Copyright © 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "igt.h"
+
+IGT_TEST_DESCRIPTION("Check the class-instance execbuf interface.");
+
+#define LOCAL_DRM_I915_GEM_ENGINE_INFO	0x37
+
+#define LOCAL_DRM_IOCTL_I915_GEM_ENGINE_INFO \
+	DRM_IOWR(DRM_COMMAND_BASE + LOCAL_DRM_I915_GEM_ENGINE_INFO, \
+		 struct local_drm_i915_gem_engine_info)
+
+enum local_drm_i915_gem_engine_class {
+	I915_ENGINE_CLASS_OTHER = 0,
+	I915_ENGINE_CLASS_RENDER = 1,
+	I915_ENGINE_CLASS_COPY = 2,
+	I915_ENGINE_CLASS_VIDEO = 3,
+	I915_ENGINE_CLASS_VIDEO_ENHANCE = 4,
+	I915_ENGINE_CLASS_MAX /* non-ABI */
+};
+
+struct local_drm_i915_engine_info {
+	/** Engine instance number. */
+	__u8	instance;
+
+	/** Engine specific info. */
+#define LOCAL_I915_VCS_HAS_HEVC	BIT(0)
+	__u8	info;
+
+	__u8	rsvd[6];
+};
+
+struct local_drm_i915_gem_engine_info {
+	/** in/out: Protocol version requested/supported. */
+	__u32 version;
+
+	/** in: Engine class to probe (enum drm_i915_gem_engine_class). */
+	__u32 engine_class;
+
+	/**
+	 * in/out: Number of struct drm_i915_engine_info entries in the provided
+	 * @info_ptr array and actual number of supported hardware engines.
+	 */
+	__u32 num_engines;
+	__u32 rsvd;
+
+	/** in/out: Pointer to array of struct i915_engine_info elements. */
+	__u64 info_ptr;
+
+};
+
+#define LOCAL_I915_EXEC_CLASS_INSTANCE	(1<<19)
+
+#define LOCAL_I915_EXEC_INSTANCE_SHIFT	(20)
+#define LOCAL_I915_EXEC_INSTANCE_MASK	(0xff << LOCAL_I915_EXEC_INSTANCE_SHIFT)
+
+#define local_i915_execbuffer2_engine(class, instance) \
+	(LOCAL_I915_EXEC_CLASS_INSTANCE | \
+	(class) | \
+	((instance) << LOCAL_I915_EXEC_INSTANCE_SHIFT))
+
+static int
+__get_engine_info(int fd, struct local_drm_i915_gem_engine_info *info)
+{
+	int ret;
+
+	ret = drmIoctl(fd, LOCAL_DRM_IOCTL_I915_GEM_ENGINE_INFO, info);
+	if (ret)
+		ret = -errno;
+
+	return ret;
+}
+
+static int noop(int fd, bool mustpass,
+		enum local_drm_i915_gem_engine_class class, uint8_t instance)
+{
+	uint32_t bbe = MI_BATCH_BUFFER_END;
+	struct drm_i915_gem_execbuffer2 execbuf;
+	struct drm_i915_gem_exec_object2 exec;
+	int ret;
+
+	memset(&exec, 0, sizeof(exec));
+	exec.handle = gem_create(fd, 4096);
+	gem_write(fd, exec.handle, 0, &bbe, sizeof(bbe));
+
+	memset(&execbuf, 0, sizeof(execbuf));
+	execbuf.buffers_ptr = to_user_pointer(&exec);
+	execbuf.buffer_count = 1;
+	execbuf.flags = local_i915_execbuffer2_engine(class, instance);
+	ret = __gem_execbuf(fd, &execbuf);
+	if (mustpass)
+		igt_assert_eq(ret, 0);
+	gem_close(fd, exec.handle);
+
+	return ret;
+}
+
+igt_main
+{
+	int fd = -1;
+	struct local_drm_i915_gem_engine_info info;
+	struct local_drm_i915_engine_info engines[16]; /* a large number */
+	enum local_drm_i915_gem_engine_class class;
+	int ret;
+
+	fd = drm_open_driver(DRIVER_INTEL);
+	igt_require_gem(fd);
+
+	memset(&info, 0, sizeof(info));
+	info.version = 1;
+	ret = __get_engine_info(fd, &info);
+	igt_require(ret == 0);
+	igt_require(info.version == 1);
+
+	ret = noop(fd, false, I915_ENGINE_CLASS_RENDER, 0);
+	igt_require(ret == 0);
+
+	igt_fork_hang_detector(fd);
+
+	igt_subtest("basic-bad-class") {
+		ret = noop(fd, false, I915_ENGINE_CLASS_MAX, 0);
+		igt_assert_eq(ret, -EINVAL);
+	}
+
+	for (class = 0; class < I915_ENGINE_CLASS_MAX; class++) {
+		int i;
+
+		memset(&info, 0, sizeof(info));
+		memset(&engines[0], 0, sizeof(engines));
+		info.version = 1;
+		info.engine_class = class;
+		info.num_engines = ARRAY_SIZE(engines);
+		info.info_ptr = (__u64)&engines[0];
+		ret = __get_engine_info(fd, &info);
+		igt_assert_eq(ret, 0);
+		if (info.num_engines == 0)
+			continue;
+		igt_subtest_f("basic-bad-instance-%u", info.engine_class) {
+			ret = noop(fd, false, info.engine_class, ~0);
+			igt_assert_eq(ret, -EINVAL);
+		}
+		for (i = 0; i < info.num_engines; i++) {
+			igt_subtest_f("basic-noop-%u-%u",
+				      info.engine_class,
+				      engines[i].instance)
+				noop(fd, true, info.engine_class,
+				     engines[i].instance);
+		}
+	}
+
+
+	igt_fixture {
+		igt_stop_hang_detector();
+		close(fd);
+	}
+}
-- 
2.9.4

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