From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 1/3] drm/i915: Check execlist/ring status during hangcheck
Date: Mon, 3 Jul 2017 14:04:57 +0100 [thread overview]
Message-ID: <20170703130459.9281-1-chris@chris-wilson.co.uk> (raw)
Before we declare an engine as idle, check if there are any pending
execlist context-switches and if the ring itself reports as idle.
Otherwise, we may be left in a situation where we miss a crucial
execlist event (or something more sinister) yet the requests complete.
Since the seqno write happens, we believe the engine to be truly idle.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/intel_hangcheck.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_hangcheck.c b/drivers/gpu/drm/i915/intel_hangcheck.c
index 9b0ece427bdc..d9d87d96fb69 100644
--- a/drivers/gpu/drm/i915/intel_hangcheck.c
+++ b/drivers/gpu/drm/i915/intel_hangcheck.c
@@ -324,7 +324,7 @@ hangcheck_get_action(struct intel_engine_cs *engine,
if (engine->hangcheck.seqno != hc->seqno)
return ENGINE_ACTIVE_SEQNO;
- if (i915_seqno_passed(hc->seqno, intel_engine_last_submit(engine)))
+ if (intel_engine_is_idle(engine))
return ENGINE_IDLE;
return engine_stuck(engine, hc->acthd);
--
2.13.2
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next reply other threads:[~2017-07-03 13:05 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-03 13:04 Chris Wilson [this message]
2017-07-03 13:04 ` [PATCH 2/3] drm/i915: Check the execlist queue for pending requests before declaring idle Chris Wilson
2017-07-03 13:04 ` [PATCH 3/3] drm/i915: Wake up waiters after setting the WEDGED bit Chris Wilson
2017-07-03 13:28 ` ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Check execlist/ring status during hangcheck Patchwork
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