From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 10/21] drm/i915: disable GTT cache for 2M/1G pages
Date: Mon, 3 Jul 2017 15:14:52 +0100 [thread overview]
Message-ID: <20170703141503.12609-11-matthew.auld@intel.com> (raw)
In-Reply-To: <20170703141503.12609-1-matthew.auld@intel.com>
When SW enables the use of 2M/1G pages, it must disable the GTT cache.
v2: don't disable for Cherryview which doesn't even support 48b PPGTT!
v3: explicitly check that the system does support 2M/1G pages
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/intel_pm.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index c3fcadfa0ae7..375be20c2d22 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -8296,10 +8296,13 @@ static void broadwell_init_clock_gating(struct drm_i915_private *dev_priv)
/*
* WaGttCachingOffByDefault:bdw
- * GTT cache may not work with big pages, so if those
- * are ever enabled GTT cache may need to be disabled.
+ * The GTT cache must be disabled if the system is planning to use
+ * 2M/1G pages.
*/
- I915_WRITE(HSW_GTT_CACHE_EN, GTT_CACHE_EN_ALL);
+ I915_WRITE(HSW_GTT_CACHE_EN,
+ HAS_PAGE_SIZE(dev_priv,
+ I915_GTT_PAGE_SIZE_2M |
+ I915_GTT_PAGE_SIZE_1G) ? 0 : GTT_CACHE_EN_ALL);
/* WaKVMNotificationOnConfigChange:bdw */
I915_WRITE(CHICKEN_PAR2_1, I915_READ(CHICKEN_PAR2_1)
--
2.9.4
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next prev parent reply other threads:[~2017-07-03 14:15 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-03 14:14 [PATCH 00/21] huge gtt pages Matthew Auld
2017-07-03 14:14 ` [PATCH 01/21] mm/shmem: introduce shmem_file_setup_with_mnt Matthew Auld
2017-07-03 14:14 ` [PATCH 02/21] drm/i915: introduce simple gemfs Matthew Auld
2017-07-03 14:14 ` [PATCH 03/21] drm/i915/gemfs: enable THP Matthew Auld
2017-07-03 14:14 ` [PATCH 04/21] drm/i915: introduce page_size_mask to dev_info Matthew Auld
2017-07-03 14:14 ` [PATCH 05/21] drm/i915: introduce page_size members Matthew Auld
2017-07-03 14:14 ` [PATCH 06/21] drm/i915: introduce vm set_pages/clear_pages Matthew Auld
2017-07-03 14:14 ` [PATCH 07/21] drm/i915: align the vma start to the largest gtt page size Matthew Auld
2017-07-03 14:14 ` [PATCH 08/21] drm/i915: align 64K objects to 2M Matthew Auld
2017-07-03 14:14 ` [PATCH 09/21] drm/i915: enable IPS bit for 64K pages Matthew Auld
2017-07-03 14:14 ` Matthew Auld [this message]
2017-07-03 14:14 ` [PATCH 11/21] drm/i915: support 1G pages for the 48b PPGTT Matthew Auld
2017-07-03 14:14 ` [PATCH 12/21] drm/i915: support 2M " Matthew Auld
2017-07-03 14:14 ` [PATCH 13/21] drm/i915: support 64K " Matthew Auld
2017-07-03 14:14 ` [PATCH 14/21] drm/i915: accurate page size tracking for the ppgtt Matthew Auld
2017-07-03 14:14 ` [PATCH 15/21] drm/i915/debugfs: include some gtt page size metrics Matthew Auld
2017-07-03 14:14 ` [PATCH 16/21] drm/i915/selftests: huge page tests Matthew Auld
2017-07-03 14:48 ` Chris Wilson
2017-07-06 11:05 ` Matthew Auld
2017-07-05 15:40 ` Chris Wilson
2017-07-03 14:14 ` [PATCH 17/21] drm/i915/selftests: mix huge pages Matthew Auld
2017-07-03 14:15 ` [PATCH 18/21] drm/i915: disable platform support for vGPU huge gtt pages Matthew Auld
2017-07-03 14:15 ` [PATCH 19/21] drm/i915: enable platform support for 64K pages Matthew Auld
2017-07-03 14:15 ` [PATCH 20/21] drm/i915: enable platform support for 2M pages Matthew Auld
2017-07-03 14:15 ` [PATCH 21/21] drm/i915: enable platform support for 1G pages Matthew Auld
2017-07-03 14:55 ` ✓ Fi.CI.BAT: success for huge gtt pages (rev4) Patchwork
-- strict thread matches above, loose matches on Subject: below --
2017-07-25 19:21 [PATCH 00/21] huge gtt pages Matthew Auld
2017-07-25 19:21 ` [PATCH 10/21] drm/i915: disable GTT cache for 2M/1G pages Matthew Auld
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