* [PATCH] drm/i915: Clear execlist port[] before updating seqno on wedging
@ 2017-07-03 14:03 Chris Wilson
2017-07-03 14:39 ` ✓ Fi.CI.BAT: success for " Patchwork
0 siblings, 1 reply; 2+ messages in thread
From: Chris Wilson @ 2017-07-03 14:03 UTC (permalink / raw)
To: intel-gfx
When we wedge the device, we clear out the in-flight requests and
advance the breadcrumb to indicate they are complete. However, the
breadcrumb advance includes an assert that the engine is idle, so that
advancement needs to be the last step to ensure we pass our own sanity
checks.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_gem.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 1b2dfa8bdeef..f387367c670e 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3050,13 +3050,6 @@ static void engine_set_wedged(struct intel_engine_cs *engine)
dma_fence_set_error(&request->fence, -EIO);
spin_unlock_irqrestore(&engine->timeline->lock, flags);
- /* Mark all pending requests as complete so that any concurrent
- * (lockless) lookup doesn't try and wait upon the request as we
- * reset it.
- */
- intel_engine_init_global_seqno(engine,
- intel_engine_last_submit(engine));
-
/*
* Clear the execlists queue up before freeing the requests, as those
* are the ones that keep the context and ringbuffer backing objects
@@ -3085,6 +3078,13 @@ static void engine_set_wedged(struct intel_engine_cs *engine)
*/
clear_bit(ENGINE_IRQ_EXECLIST, &engine->irq_posted);
}
+
+ /* Mark all pending requests as complete so that any concurrent
+ * (lockless) lookup doesn't try and wait upon the request as we
+ * reset it.
+ */
+ intel_engine_init_global_seqno(engine,
+ intel_engine_last_submit(engine));
}
static int __i915_gem_set_wedged_BKL(void *data)
--
2.13.2
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^ permalink raw reply related [flat|nested] 2+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Clear execlist port[] before updating seqno on wedging
2017-07-03 14:03 [PATCH] drm/i915: Clear execlist port[] before updating seqno on wedging Chris Wilson
@ 2017-07-03 14:39 ` Patchwork
0 siblings, 0 replies; 2+ messages in thread
From: Patchwork @ 2017-07-03 14:39 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Clear execlist port[] before updating seqno on wedging
URL : https://patchwork.freedesktop.org/series/26753/
State : success
== Summary ==
Series 26753v1 drm/i915: Clear execlist port[] before updating seqno on wedging
https://patchwork.freedesktop.org/api/1.0/series/26753/revisions/1/mbox/
Test kms_pipe_crc_basic:
Subgroup hang-read-crc-pipe-b:
pass -> DMESG-WARN (fi-pnv-d510) fdo#101597
fdo#101597 https://bugs.freedesktop.org/show_bug.cgi?id=101597
fi-bdw-5557u total:279 pass:264 dwarn:0 dfail:0 fail:3 skip:11 time:435s
fi-bdw-gvtdvm total:279 pass:257 dwarn:8 dfail:0 fail:0 skip:14 time:429s
fi-blb-e6850 total:279 pass:224 dwarn:1 dfail:0 fail:0 skip:54 time:357s
fi-bsw-n3050 total:279 pass:239 dwarn:0 dfail:0 fail:3 skip:36 time:516s
fi-bxt-j4205 total:279 pass:256 dwarn:0 dfail:0 fail:3 skip:19 time:506s
fi-byt-j1900 total:279 pass:250 dwarn:1 dfail:0 fail:3 skip:24 time:470s
fi-byt-n2820 total:279 pass:246 dwarn:1 dfail:0 fail:3 skip:28 time:477s
fi-glk-2a total:279 pass:256 dwarn:0 dfail:0 fail:3 skip:19 time:584s
fi-hsw-4770 total:279 pass:259 dwarn:0 dfail:0 fail:3 skip:16 time:426s
fi-hsw-4770r total:279 pass:259 dwarn:0 dfail:0 fail:3 skip:16 time:415s
fi-ilk-650 total:279 pass:225 dwarn:0 dfail:0 fail:3 skip:50 time:413s
fi-ivb-3520m total:279 pass:257 dwarn:0 dfail:0 fail:3 skip:18 time:496s
fi-ivb-3770 total:279 pass:257 dwarn:0 dfail:0 fail:3 skip:18 time:469s
fi-kbl-7500u total:279 pass:257 dwarn:0 dfail:0 fail:3 skip:18 time:461s
fi-kbl-7560u total:279 pass:264 dwarn:1 dfail:0 fail:3 skip:10 time:567s
fi-kbl-r total:279 pass:256 dwarn:1 dfail:0 fail:3 skip:18 time:571s
fi-pnv-d510 total:279 pass:222 dwarn:2 dfail:0 fail:0 skip:55 time:563s
fi-skl-6260u total:279 pass:265 dwarn:0 dfail:0 fail:3 skip:10 time:451s
fi-skl-6700hq total:279 pass:219 dwarn:1 dfail:0 fail:33 skip:24 time:303s
fi-skl-6700k total:279 pass:257 dwarn:0 dfail:0 fail:3 skip:18 time:463s
fi-skl-6770hq total:279 pass:265 dwarn:0 dfail:0 fail:3 skip:10 time:479s
fi-skl-gvtdvm total:279 pass:266 dwarn:0 dfail:0 fail:0 skip:13 time:445s
fi-snb-2520m total:279 pass:247 dwarn:0 dfail:0 fail:3 skip:28 time:535s
fi-snb-2600 total:279 pass:246 dwarn:0 dfail:0 fail:3 skip:29 time:395s
df0182c2c95385492772c6e4ace76b463298b8ca drm-tip: 2017y-07m-03d-13h-20m-24s UTC integration manifest
27d6b47 drm/i915: Clear execlist port[] before updating seqno on wedging
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_5094/
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2017-07-03 14:39 ` ✓ Fi.CI.BAT: success for " Patchwork
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