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* [PATCH] drm/i915/cnl: Fix DP max voltage
@ 2017-07-10 18:18 Rodrigo Vivi
  2017-07-10 18:40 ` Ville Syrjälä
  2017-07-10 18:56 ` ✓ Fi.CI.BAT: success for " Patchwork
  0 siblings, 2 replies; 9+ messages in thread
From: Rodrigo Vivi @ 2017-07-10 18:18 UTC (permalink / raw)
  To: intel-gfx; +Cc: Rodrigo Vivi

On clock recovery this function is called to find out
the max voltage swing level that we could go.

However gen 9 functions use the old buffer translation tables
to figure that out. That table is not valid for CNL
causing an invalid number of entries and an invalid selection
on the max voltage swing level.

Always picking Level 3 on CNL seems to be the safest way to
go instead of doing something similar to gen9 look-up.

So, unless we find a good reason let's simplify and follow
the most used way to get the max DP voltage.

Cc: Clint Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 80b5dcb..ab81be4 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3116,7 +3116,7 @@ static bool intel_dp_get_alpm_status(struct intel_dp *intel_dp)
 	struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp));
 	enum port port = dp_to_dig_port(intel_dp)->port;
 
-	if (IS_GEN9_LP(dev_priv))
+	if (IS_GEN9_LP(dev_priv) || IS_CANNONLAKE(dev_priv))
 		return DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
 	else if (INTEL_GEN(dev_priv) >= 9) {
 		struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
-- 
1.9.1

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^ permalink raw reply related	[flat|nested] 9+ messages in thread
* Re: [PATCH 8/8] drm/i915/cnl: Fix DP max voltage
@ 2017-08-30 14:20 Ville Syrjälä
  0 siblings, 0 replies; 9+ messages in thread
From: Ville Syrjälä @ 2017-08-30 14:20 UTC (permalink / raw)
  To: Rodrigo Vivi; +Cc: intel-gfx

On Tue, Aug 29, 2017 at 04:22:30PM -0700, Rodrigo Vivi wrote:
> On clock recovery this function is called to find out
> the max voltage swing level that we could go.
> 
> However gen 9 functions use the old buffer translation tables
> to figure that out. That table is not valid for CNL
> causing an invalid number of entries and an invalid selection
> on the max voltage swing level.
> 
> v2: Let's use same approach that previous platforms.
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Clint Taylor <clinton.a.taylor@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 35 +++++++++++++++++++++++++++++++----
>  1 file changed, 31 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index f1757a8e481a..97ff082c28a7 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -649,6 +649,29 @@ cnl_get_buf_trans_edp(struct drm_i915_private *dev_priv, int *n_entries)
>  	}
>  }
>  
> +static int cnl_max_level(struct drm_i915_private *dev_priv,
> +			 enum intel_output_type type)
> +{
> +	int n_entries = 0;
> +
> +	switch (type) {
> +	case INTEL_OUTPUT_DP:

These encoder->type checks are a bit problematic due to the DDI encoder
type changing dynamically. But to fix that I thunk I'll just need to
resurrect my old patches to get rid of that type changing. But I'll
wait until you cand land these since I need to rebase my stuff anyway.

> +		cnl_get_buf_trans_dp(dev_priv, &n_entries);
> +		break;
> +	case INTEL_OUTPUT_EDP:
> +		cnl_get_buf_trans_edp(dev_priv, &n_entries);
> +		break;
> +	case INTEL_OUTPUT_HDMI:
> +		cnl_get_buf_trans_hdmi(dev_priv, &n_entries);
> +		break;
> +	default:
> +		MISSING_CASE(type);
> +		return 0;
> +	}
> +
> +	return n_entries - 1;
> +}
> +
>  static int intel_ddi_hdmi_level(struct drm_i915_private *dev_priv, enum port port)
>  {
>  	int n_hdmi_entries;
> @@ -1879,10 +1902,14 @@ u8 intel_ddi_dp_voltage_max(struct intel_encoder *encoder)
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>  	int n_entries;
>  
> -	if (encoder->type == INTEL_OUTPUT_EDP)
> -		intel_ddi_get_buf_trans_edp(dev_priv, &n_entries);
> -	else
> -		intel_ddi_get_buf_trans_dp(dev_priv, &n_entries);
> +	if (IS_CANNONLAKE(dev_priv)) {
> +		cnl_max_level(dev_priv, encoder->type);
> +	} else {
> +		if (encoder->type == INTEL_OUTPUT_EDP)
> +			intel_ddi_get_buf_trans_edp(dev_priv, &n_entries);
> +		else
> +			intel_ddi_get_buf_trans_dp(dev_priv, &n_entries);
> +	}
>  
>  	if (WARN_ON(n_entries < 1))
>  		n_entries = 1;
> -- 
> 2.13.2

-- 
Ville Syrjälä
Intel OTC
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^ permalink raw reply	[flat|nested] 9+ messages in thread
[parent not found: <Message-id: <20170830142037.GH4914@intel.com>]
[parent not found: <Message-id: <20170831123436.GO4914@intel.com>]
end of thread, other threads:[~2017-08-31 16:49 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-07-10 18:18 [PATCH] drm/i915/cnl: Fix DP max voltage Rodrigo Vivi
2017-07-10 18:40 ` Ville Syrjälä
2017-07-10 19:25   ` Vivi, Rodrigo
2017-07-10 18:56 ` ✓ Fi.CI.BAT: success for " Patchwork
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2017-08-30 14:20 [PATCH 8/8] " Ville Syrjälä
     [not found] <Message-id: <20170830142037.GH4914@intel.com>
2017-08-31  0:00 ` [PATCH] " Rodrigo Vivi
2017-08-31 12:34   ` Ville Syrjälä
     [not found] <Message-id: <20170831123436.GO4914@intel.com>
2017-08-31 14:53 ` Rodrigo Vivi
2017-08-31 15:06   ` Ville Syrjälä
2017-08-31 16:49     ` Vivi, Rodrigo

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